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| author | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2022-10-27 10:46:50 +0300 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2022-11-07 06:11:10 +0300 |
| commit | 1caf66104c02d327a2467a69ab18fb24b44e9715 (patch) | |
| tree | faab56f358d436c778c5aa6c23d1c9cf6f837042 | |
| parent | 15d9fcbb3e6e8420c7d1ae331405780c5d9c1c25 (diff) | |
| download | linux-1caf66104c02d327a2467a69ab18fb24b44e9715.tar.xz | |
arm64: dts: qcom: sc7280: fix codec reset line polarity for CRD 3.0/3.1
The driver for the codec, when resetting the chip, first drives the line
low, and then high. This means that the line is active low. Change the
annotation in the DTS accordingly.
Fixes: 0a3a56a93fd9 ("arm64: dts: qcom: sc7280: Add wcd9385 codec node for CRD 3.0/3.1")
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221027074652.1044235-4-dmitry.torokhov@gmail.com
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi b/arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi index a42b5878a75f..df49564ae6dc 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi @@ -37,7 +37,7 @@ pinctrl-0 = <&wcd_reset_n>, <&us_euro_hs_sel>; pinctrl-1 = <&wcd_reset_n_sleep>, <&us_euro_hs_sel>; - reset-gpios = <&tlmm 83 GPIO_ACTIVE_HIGH>; + reset-gpios = <&tlmm 83 GPIO_ACTIVE_LOW>; us-euro-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>; qcom,rx-device = <&wcd_rx>; |