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| author | Joey Gouly <joey.gouly@arm.com> | 2023-06-06 17:58:45 +0300 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2023-06-06 18:52:40 +0300 |
| commit | 2b760046a2d3d630d42bbe416f5d7f43792a1639 (patch) | |
| tree | 553df27d2ba0ab6324b3f90761c3616b4fa7636b | |
| parent | edc25898f0b6cceed6c90b0e79916bd04de7dd19 (diff) | |
| download | linux-2b760046a2d3d630d42bbe416f5d7f43792a1639.tar.xz | |
arm64: cpufeature: add TCR2 cpucap
This capability indicates if the system supports the TCR2_ELx system register.
Signed-off-by: Joey Gouly <joey.gouly@arm.com>
Cc: Will Deacon <will@kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20230606145859.697944-7-joey.gouly@arm.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| -rw-r--r-- | arch/arm64/kernel/cpufeature.c | 6 | ||||
| -rw-r--r-- | arch/arm64/tools/cpucaps | 1 |
2 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 416c794207c1..12107c07fb77 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -2674,6 +2674,12 @@ static const struct arm64_cpu_capabilities arm64_features[] = { .cpu_enable = cpu_enable_mops, ARM64_CPUID_FIELDS(ID_AA64ISAR2_EL1, MOPS, IMP) }, + { + .capability = ARM64_HAS_TCR2, + .type = ARM64_CPUCAP_SYSTEM_FEATURE, + .matches = has_cpuid_feature, + ARM64_CPUID_FIELDS(ID_AA64MMFR3_EL1, TCRX, IMP) + }, {}, }; diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps index debc4609f129..ebf5d4407b64 100644 --- a/arch/arm64/tools/cpucaps +++ b/arch/arm64/tools/cpucaps @@ -44,6 +44,7 @@ HAS_RAS_EXTN HAS_RNG HAS_SB HAS_STAGE2_FWB +HAS_TCR2 HAS_TIDCP1 HAS_TLB_RANGE HAS_VIRT_HOST_EXTN |