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authorStefan Agner <stefan@agner.ch>2020-12-07 20:58:02 +0300
committerKevin Hilman <khilman@baylibre.com>2020-12-07 22:12:49 +0300
commit3d07c3b3a886fefd583c1b485b5e4e3c4e2da493 (patch)
treec9fee80da61e23c9c89c75cc4b76175c51a87ff4
parent656ab1bdcd2b755dc161a9774201100d5bf74b8d (diff)
downloadlinux-3d07c3b3a886fefd583c1b485b5e4e3c4e2da493.tar.xz
arm64: dts: meson: g12a: x96-max: fix PHY deassert timing requirements
According to the datasheet (Rev. 1.9) the RTL8211F requires at least 72ms "for internal circuits settling time" before accessing the PHY registers. On similar boards with the same PHY this fixes an issue where Ethernet link would not come up when using ip link set down/up. Fixes: ed5e8f689154 ("arm64: dts: meson: g12a: x96-max: fix the Ethernet PHY reset line") Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/12506964ca5d5f936579a280ad0a7e7f9a0a2d4c.1607363522.git.stefan@agner.ch
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
index 1b07c8c06eac..463a72d6bb7c 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
@@ -340,7 +340,7 @@
eee-broken-1000t;
reset-assert-us = <10000>;
- reset-deassert-us = <30000>;
+ reset-deassert-us = <80000>;
reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
interrupt-parent = <&gpio_intc>;