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authorAndy Teng <andy.teng@mediatek.com>2020-08-19 11:43:40 +0300
committerMartin K. Petersen <martin.petersen@oracle.com>2020-08-21 04:59:34 +0300
commit460d74a0911c562f56148519a2467271271a73aa (patch)
treef4d8760aa6a5cd1dee75149fccd84eb7958d4bca
parent50807f22c89f77f8478d2feb8e1289582034e06e (diff)
downloadlinux-460d74a0911c562f56148519a2467271271a73aa.tar.xz
scsi: ufs: ufs-mediatek: Modify the minimum RX/TX lane count to 2
MediaTek UFS host now supports 2 lanes. Modify the lane count to 2. This modification shall not impact old 1-lane host because PA_CONNECTEDRXDATALANES and PA_CONNECTEDTXDATALANES will limit the target lanes properly during power mode change. So we could relax the limitation in ufs_dev_params. Link: https://lore.kernel.org/r/20200819084340.7021-1-stanley.chu@mediatek.com Reviewed-by: Stanley Chu <stanley.chu@mediatek.com> Reviewed-by: Avri Altman <avri.altman@wdc.com> Signed-off-by: Andy Teng <andy.teng@mediatek.com> Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
-rw-r--r--drivers/scsi/ufs/ufs-mediatek.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/scsi/ufs/ufs-mediatek.h b/drivers/scsi/ufs/ufs-mediatek.h
index 8ed24d5fcff9..87657376d27a 100644
--- a/drivers/scsi/ufs/ufs-mediatek.h
+++ b/drivers/scsi/ufs/ufs-mediatek.h
@@ -33,8 +33,8 @@
/*
* Vendor specific pre-defined parameters
*/
-#define UFS_MTK_LIMIT_NUM_LANES_RX 1
-#define UFS_MTK_LIMIT_NUM_LANES_TX 1
+#define UFS_MTK_LIMIT_NUM_LANES_RX 2
+#define UFS_MTK_LIMIT_NUM_LANES_TX 2
#define UFS_MTK_LIMIT_HSGEAR_RX UFS_HS_G3
#define UFS_MTK_LIMIT_HSGEAR_TX UFS_HS_G3
#define UFS_MTK_LIMIT_PWMGEAR_RX UFS_PWM_G4