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author | Douglas Anderson <dianders@chromium.org> | 2018-07-24 20:45:12 +0300 |
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committer | Stephen Boyd <sboyd@kernel.org> | 2018-08-29 01:56:25 +0300 |
commit | 48735597f7bd4421fe1e9392899ae9654c263315 (patch) | |
tree | f868e22b1f893ab9f361bf977e121b1331b61f91 | |
parent | 5b394b2ddf0347bef56e50c69a58773c94343ff3 (diff) | |
download | linux-48735597f7bd4421fe1e9392899ae9654c263315.tar.xz |
clk: qcom: Add qspi (Quad SPI) clock defines for sdm845 to header
These clocks will need to be defined in the clock driver and
referenced in device tree files.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
-rw-r--r-- | include/dt-bindings/clock/qcom,gcc-sdm845.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/qcom,gcc-sdm845.h b/include/dt-bindings/clock/qcom,gcc-sdm845.h index f96fc2dbf60e..b8eae5a76503 100644 --- a/include/dt-bindings/clock/qcom,gcc-sdm845.h +++ b/include/dt-bindings/clock/qcom,gcc-sdm845.h @@ -194,6 +194,9 @@ #define GPLL4 184 #define GCC_CPUSS_DVM_BUS_CLK 185 #define GCC_CPUSS_GNOC_CLK 186 +#define GCC_QSPI_CORE_CLK_SRC 187 +#define GCC_QSPI_CORE_CLK 188 +#define GCC_QSPI_CNOC_PERIPH_AHB_CLK 189 /* GCC Resets */ #define GCC_MMSS_BCR 0 |