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authorSergej Sawazki <sergej@taudac.com>2017-09-16 14:44:41 +0300
committerStephen Boyd <sboyd@codeaurora.org>2017-12-22 05:09:18 +0300
commit51279ef9f64cf7eb8b3f891a2b60fa1aa4938afc (patch)
tree8406d6a2eb541671c99e636161023430a01054df
parent758231d5a80a784d60ce7c96b27f8771ca4c682b (diff)
downloadlinux-51279ef9f64cf7eb8b3f891a2b60fa1aa4938afc.tar.xz
clk: si5351: Add DT property to enable PLL reset
Add optional output clock DT property to enable PLL reset when a clock output is enabled. Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Rabeeh Khoury <rabeeh@solid-run.com> Cc: Russell King <linux@armlinux.org.uk> Signed-off-by: Sergej Sawazki <sergej@taudac.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-rw-r--r--Documentation/devicetree/bindings/clock/silabs,si5351.txt1
-rw-r--r--drivers/clk/clk-si5351.c3
-rw-r--r--include/linux/platform_data/si5351.h2
3 files changed, 6 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/silabs,si5351.txt b/Documentation/devicetree/bindings/clock/silabs,si5351.txt
index a6c4ef343b44..f00191cad8cd 100644
--- a/Documentation/devicetree/bindings/clock/silabs,si5351.txt
+++ b/Documentation/devicetree/bindings/clock/silabs,si5351.txt
@@ -49,6 +49,7 @@ Optional child node properties:
- silabs,multisynth-source: source pll A(0) or B(1) of corresponding multisynth
divider.
- silabs,pll-master: boolean, multisynth can change pll frequency.
+- silabs,pll-reset: boolean, clock output can reset its pll.
- silabs,disable-state : clock output disable state, shall be
0 = clock output is driven LOW when disabled
1 = clock output is driven HIGH when disabled
diff --git a/drivers/clk/clk-si5351.c b/drivers/clk/clk-si5351.c
index 36a15f161dfd..f63fcc0d8cf5 100644
--- a/drivers/clk/clk-si5351.c
+++ b/drivers/clk/clk-si5351.c
@@ -1297,6 +1297,9 @@ static int si5351_dt_parse(struct i2c_client *client,
pdata->clkout[num].pll_master =
of_property_read_bool(child, "silabs,pll-master");
+
+ pdata->clkout[num].pll_reset =
+ of_property_read_bool(child, "silabs,pll-reset");
}
client->dev.platform_data = pdata;
diff --git a/include/linux/platform_data/si5351.h b/include/linux/platform_data/si5351.h
index 818c5c6e203f..c71a2dd66143 100644
--- a/include/linux/platform_data/si5351.h
+++ b/include/linux/platform_data/si5351.h
@@ -86,6 +86,7 @@ enum si5351_disable_state {
* @multisynth_src: multisynth source clock
* @clkout_src: clkout source clock
* @pll_master: if true, clkout can also change pll rate
+ * @pll_reset: if true, clkout can reset its pll
* @drive: output drive strength
* @rate: initial clkout rate, or default if 0
*/
@@ -95,6 +96,7 @@ struct si5351_clkout_config {
enum si5351_drive_strength drive;
enum si5351_disable_state disable_state;
bool pll_master;
+ bool pll_reset;
unsigned long rate;
};