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author | Bjorn Andersson <bjorn.andersson@linaro.org> | 2019-03-06 20:47:56 +0300 |
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committer | Stephen Boyd <sboyd@kernel.org> | 2019-04-11 23:34:10 +0300 |
commit | 5f19c6e936f2300fa236773a4aef3b4ec8aaad7c (patch) | |
tree | 01cc96e9f6c432e934b706567e6c08cec74be51f | |
parent | 8bc7a04bb7838d6bad8b255959d338f93eb5822d (diff) | |
download | linux-5f19c6e936f2300fa236773a4aef3b4ec8aaad7c.tar.xz |
dt-bindings: clock: Introduce Qualcomm Turing Clock controller
Add devicetree binding for the turing clock controller found in QCS404.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
-rw-r--r-- | Documentation/devicetree/bindings/clock/qcom,turingcc.txt | 19 | ||||
-rw-r--r-- | include/dt-bindings/clock/qcom,turingcc-qcs404.h | 15 |
2 files changed, 34 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/qcom,turingcc.txt b/Documentation/devicetree/bindings/clock/qcom,turingcc.txt new file mode 100644 index 000000000000..126517de5f9a --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,turingcc.txt @@ -0,0 +1,19 @@ +Qualcomm Turing Clock & Reset Controller Binding +------------------------------------------------ + +Required properties : +- compatible: shall contain "qcom,qcs404-turingcc". +- reg: shall contain base register location and length. +- clocks: ahb clock for the TuringCC +- #clock-cells: from common clock binding, shall contain 1. +- #reset-cells: from common reset binding, shall contain 1. + +Example: + turingcc: clock-controller@800000 { + compatible = "qcom,qcs404-turingcc"; + reg = <0x00800000 0x30000>; + clocks = <&gcc GCC_CDSP_CFG_AHB_CLK>; + + #clock-cells = <1>; + #reset-cells = <1>; + }; diff --git a/include/dt-bindings/clock/qcom,turingcc-qcs404.h b/include/dt-bindings/clock/qcom,turingcc-qcs404.h new file mode 100644 index 000000000000..838faef57c67 --- /dev/null +++ b/include/dt-bindings/clock/qcom,turingcc-qcs404.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2019, Linaro Ltd + */ + +#ifndef _DT_BINDINGS_CLK_TURING_QCS404_H +#define _DT_BINDINGS_CLK_TURING_QCS404_H + +#define TURING_Q6SS_Q6_AXIM_CLK 0 +#define TURING_Q6SS_AHBM_AON_CLK 1 +#define TURING_WRAPPER_AON_CLK 2 +#define TURING_Q6SS_AHBS_AON_CLK 3 +#define TURING_WRAPPER_QOS_AHBS_AON_CLK 4 + +#endif |