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authorMauro Carvalho Chehab <mchehab+huawei@kernel.org>2020-09-29 12:09:46 +0300
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>2020-10-15 08:49:43 +0300
commit64d4151658c14b18905ba0d82cc26ccf6b92a1a1 (patch)
treeeacc43a02026c928452a7784e9fbafac52c5246e
parent4d9d18ad669170eb97606bcbe832517495737c57 (diff)
downloadlinux-64d4151658c14b18905ba0d82cc26ccf6b92a1a1.tar.xz
docs: fpga: replace :c:member: macros
Those macros are not doing the right thing with Sphinx 3, causing parse errors: ./Documentation/driver-api/fpga/fpga-mgr.rst:104: WARNING: Unparseable C cross-reference: 'fpga_manager->state' Invalid C declaration: Expected end of definition. [error at 12] fpga_manager->state ------------^ ./Documentation/driver-api/fpga/fpga-programming.rst:18: WARNING: Unparseable C cross-reference: 'fpga_region->info' Invalid C declaration: Expected end of definition. [error at 11] fpga_region->info -----------^ ./Documentation/driver-api/fpga/fpga-region.rst:62: WARNING: Unparseable C cross-reference: 'fpga_region->bridge_list' Invalid C declaration: Expected end of definition. [error at 11] fpga_region->bridge_list -----------^ ./Documentation/driver-api/fpga/fpga-region.rst:62: WARNING: Unparseable C cross-reference: 'fpga_region->get_bridges' Invalid C declaration: Expected end of definition. [error at 11] fpga_region->get_bridges -----------^ Replace them by :c:expr:, with does what's desired. Reviewed-by: Moritz Fischer <mdf@kernel.org> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
-rw-r--r--Documentation/driver-api/fpga/fpga-mgr.rst2
-rw-r--r--Documentation/driver-api/fpga/fpga-programming.rst2
-rw-r--r--Documentation/driver-api/fpga/fpga-region.rst4
3 files changed, 4 insertions, 4 deletions
diff --git a/Documentation/driver-api/fpga/fpga-mgr.rst b/Documentation/driver-api/fpga/fpga-mgr.rst
index 22f7885b32c9..917ee22db429 100644
--- a/Documentation/driver-api/fpga/fpga-mgr.rst
+++ b/Documentation/driver-api/fpga/fpga-mgr.rst
@@ -101,7 +101,7 @@ in state.
API for implementing a new FPGA Manager driver
----------------------------------------------
-* ``fpga_mgr_states`` — Values for :c:member:`fpga_manager->state`.
+* ``fpga_mgr_states`` — Values for :c:expr:`fpga_manager->state`.
* struct fpga_manager — the FPGA manager struct
* struct fpga_manager_ops — Low level FPGA manager driver ops
* devm_fpga_mgr_create() — Allocate and init a manager struct
diff --git a/Documentation/driver-api/fpga/fpga-programming.rst b/Documentation/driver-api/fpga/fpga-programming.rst
index f487ad64dfb9..002392dab04f 100644
--- a/Documentation/driver-api/fpga/fpga-programming.rst
+++ b/Documentation/driver-api/fpga/fpga-programming.rst
@@ -15,7 +15,7 @@ the FPGA manager and bridges. It will:
* lock the mutex of the region's FPGA manager
* build a list of FPGA bridges if a method has been specified to do so
* disable the bridges
- * program the FPGA using info passed in :c:member:`fpga_region->info`.
+ * program the FPGA using info passed in :c:expr:`fpga_region->info`.
* re-enable the bridges
* release the locks
diff --git a/Documentation/driver-api/fpga/fpga-region.rst b/Documentation/driver-api/fpga/fpga-region.rst
index 3e52be7e2968..363a8171ab0a 100644
--- a/Documentation/driver-api/fpga/fpga-region.rst
+++ b/Documentation/driver-api/fpga/fpga-region.rst
@@ -61,9 +61,9 @@ during the region's probe function.
The FPGA region will need to specify which bridges to control while programming
the FPGA. The region driver can build a list of bridges during probe time
-(:c:member:`fpga_region->bridge_list`) or it can have a function that creates
+(:c:expr:`fpga_region->bridge_list`) or it can have a function that creates
the list of bridges to program just before programming
-(:c:member:`fpga_region->get_bridges`). The FPGA bridge framework supplies the
+(:c:expr:`fpga_region->get_bridges`). The FPGA bridge framework supplies the
following APIs to handle building or tearing down that list.
* fpga_bridge_get_to_list() — Get a ref of an FPGA bridge, add it to a