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author | Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> | 2019-02-15 08:49:55 +0300 |
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committer | Wei Xu <xuwei5@hisilicon.com> | 2019-04-08 17:49:08 +0300 |
commit | 757a4b2913eb46df23af9e151e2cdd326d4542b5 (patch) | |
tree | 7edfbb1f29f7ae58c4c6ce09f387ae3cfdb05e1d | |
parent | 258bbef06ce962dbe1864c379aa90d84ff57f819 (diff) | |
download | linux-757a4b2913eb46df23af9e151e2cdd326d4542b5.tar.xz |
arm64: dts: hisilicon: hi3670: Add reset controller support
Add reset controller support for HiSilicon HI3670 SoC.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
-rw-r--r-- | arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi index 2ed06e4588b8..bc8363bc3b9c 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi @@ -151,6 +151,13 @@ #clock-cells = <1>; }; + crg_rst: crg_rst_controller { + compatible = "hisilicon,hi3670-reset", + "hisilicon,hi3660-reset"; + #reset-cells = <2>; + hisi,rst-syscon = <&crg_ctrl>; + }; + pctrl: pctrl@e8a09000 { compatible = "hisilicon,hi3670-pctrl", "syscon"; reg = <0x0 0xe8a09000 0x0 0x1000>; |