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authorHeiko Stuebner <heiko.stuebner@cherry.de>2024-06-03 22:22:54 +0300
committerHeiko Stuebner <heiko@sntech.de>2024-06-08 17:45:29 +0300
commita21d2cc2f9039023105bf9f9bf1acf324d5ebf9d (patch)
tree0daa10f43ecf174454f3d1daa4d3a72e40aeedfc
parentd2a52f678883fe4bc00bca89366b1ba504750abf (diff)
downloadlinux-a21d2cc2f9039023105bf9f9bf1acf324d5ebf9d.tar.xz
arm64: dts: rockchip: set correct pwm0 pinctrl on rk3588-tiger
PWM0 on rk3588-tiger is connected to the BLT_CTRL pin of the Q7 connector meant as the name implies to control a backlight device. Therefore set the correct M1 pinctrl variant for it. The M0 variant cannot ever be used because that pin is routed to a connector pin on the Q7 connector that is reserved for CAN use and the pin reachable by the M2 variant is reserved for the embedded MCU on the SoM. Fixes: 6173ef24b35b ("arm64: dts: rockchip: add RK3588-Q7 (Tiger) SoM") Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://lore.kernel.org/r/20240603192254.2441025-1-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi
index aebe1fedd2d8..615094bb8ba3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi
@@ -344,6 +344,11 @@
};
};
+&pwm0 {
+ pinctrl-0 = <&pwm0m1_pins>;
+ pinctrl-names = "default";
+};
+
&saradc {
vref-supply = <&vcc_1v8_s0>;
status = "okay";