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| author | Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> | 2023-03-31 17:59:14 +0300 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2023-04-08 02:30:47 +0300 |
| commit | a6d1d862638b51f2a874948f75fd7284d066f900 (patch) | |
| tree | 1fccef95fdc37cd317d967fd23e7312ac9685ff4 | |
| parent | f6b161efbb456b11731a4afa330c82223e883832 (diff) | |
| download | linux-a6d1d862638b51f2a874948f75fd7284d066f900.tar.xz | |
ARM: dts: qcom: sdx55: Move reset and wake gpios to board dts
The reset and wake properties in the PCIe EP node belong to the board dts
as they can be customized per board design. So let's move them from SoC
dtsi.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230331145915.11653-1-manivannan.sadhasivam@linaro.org
| -rw-r--r-- | arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts | 3 | ||||
| -rw-r--r-- | arch/arm/boot/dts/qcom-sdx55.dtsi | 2 |
2 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts b/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts index 81f33eba39e5..b73b707342af 100644 --- a/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts +++ b/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts @@ -255,6 +255,9 @@ pinctrl-names = "default"; pinctrl-0 = <&pcie_ep_clkreq_default &pcie_ep_perst_default &pcie_ep_wake_default>; + + reset-gpios = <&tlmm 57 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 53 GPIO_ACTIVE_LOW>; }; &qpic_bam { diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi index 9148a840b8a0..342c3d14001e 100644 --- a/arch/arm/boot/dts/qcom-sdx55.dtsi +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi @@ -421,8 +421,6 @@ <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "global", "doorbell"; - reset-gpios = <&tlmm 57 GPIO_ACTIVE_LOW>; - wake-gpios = <&tlmm 53 GPIO_ACTIVE_LOW>; resets = <&gcc GCC_PCIE_BCR>; reset-names = "core"; power-domains = <&gcc PCIE_GDSC>; |