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authorPhil Edworthy <phil.edworthy@renesas.com>2022-05-03 14:55:57 +0300
committerGeert Uytterhoeven <geert+renesas@glider.be>2022-05-06 12:09:57 +0300
commitad1bd2bf658062c6edc5ff1ee1725565a4fc8930 (patch)
tree520ccc21f7e11ce6be1bb4e5038e40a764292904
parentfb1929b98f2e1c012b4df596b7b2c9f6f28fbe54 (diff)
downloadlinux-ad1bd2bf658062c6edc5ff1ee1725565a4fc8930.tar.xz
arm64: dts: renesas: Add initial device tree for RZ/V2M EVK
Add basic support for RZ/V2M EVK (based on R9A09G011): - memory - External input clock - UART Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220503115557.53370-13-phil.edworthy@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-rw-r--r--arch/arm64/boot/dts/renesas/Makefile2
-rw-r--r--arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts44
2 files changed, 46 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index 15309309a2e1..e66d76d42e52 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -83,3 +83,5 @@ dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-smarc.dtb
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc.dtb
dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-smarc.dtb
+
+dtb-$(CONFIG_ARCH_R9A09G011) += r9a09g011-v2mevk2.dtb
diff --git a/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts b/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts
new file mode 100644
index 000000000000..c207d8ce5523
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Device Tree Source for the RZ/V2M (r9a09g011) Evaluation Kit Board
+ *
+ * Copyright (C) 2022 Renesas Electronics Corp.
+ */
+
+/dts-v1/;
+#include "r9a09g011.dtsi"
+
+/ {
+ model = "RZ/V2M Evaluation Kit 2.0";
+ compatible = "renesas,rzv2mevk2", "renesas,r9a09g011";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@58000000 {
+ device_type = "memory";
+ /*
+ * first 1.25GiB is reserved for ISP Firmware,
+ * next 128MiB is reserved for secure area.
+ */
+ reg = <0x0 0x58000000 0x0 0x28000000>;
+ };
+
+ memory@180000000 {
+ device_type = "memory";
+ reg = <0x1 0x80000000 0x0 0x80000000>;
+ };
+};
+
+&extal_clk {
+ clock-frequency = <48000000>;
+};
+
+&uart0 {
+ status = "okay";
+};