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| author | Konrad Dybcio <konrad.dybcio@linaro.org> | 2023-08-09 00:02:44 +0300 |
|---|---|---|
| committer | Rob Clark <robdclark@chromium.org> | 2023-08-17 20:09:53 +0300 |
| commit | c5597e58a56c4eb233ae2d15d06ed39fd94b2405 (patch) | |
| tree | a3942fe781b0429eb12d41043340fee5134163dd | |
| parent | 26ed8d3dc06dd154583db19c3bd19824d989e8d8 (diff) | |
| download | linux-c5597e58a56c4eb233ae2d15d06ed39fd94b2405.tar.xz | |
drm/msm/a6xx: Move LLC accessors to the common header
Move these wrappers in preparation for use in a6xx_gmu.c
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # sm8450
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/551824/
Signed-off-by: Rob Clark <robdclark@chromium.org>
| -rw-r--r-- | drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 15 | ||||
| -rw-r--r-- | drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 15 |
2 files changed, 15 insertions, 15 deletions
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index 0fef92f71c4e..6dd6d72bcd86 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -1735,21 +1735,6 @@ static irqreturn_t a6xx_irq(struct msm_gpu *gpu) return IRQ_HANDLED; } -static void a6xx_llc_rmw(struct a6xx_gpu *a6xx_gpu, u32 reg, u32 mask, u32 or) -{ - return msm_rmw(a6xx_gpu->llc_mmio + (reg << 2), mask, or); -} - -static u32 a6xx_llc_read(struct a6xx_gpu *a6xx_gpu, u32 reg) -{ - return msm_readl(a6xx_gpu->llc_mmio + (reg << 2)); -} - -static void a6xx_llc_write(struct a6xx_gpu *a6xx_gpu, u32 reg, u32 value) -{ - msm_writel(value, a6xx_gpu->llc_mmio + (reg << 2)); -} - static void a6xx_llc_deactivate(struct a6xx_gpu *a6xx_gpu) { llcc_slice_deactivate(a6xx_gpu->llc_slice); diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h index ab66d281828c..34822b080759 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h @@ -62,6 +62,21 @@ static inline bool a6xx_has_gbif(struct adreno_gpu *gpu) return true; } +static inline void a6xx_llc_rmw(struct a6xx_gpu *a6xx_gpu, u32 reg, u32 mask, u32 or) +{ + return msm_rmw(a6xx_gpu->llc_mmio + (reg << 2), mask, or); +} + +static inline u32 a6xx_llc_read(struct a6xx_gpu *a6xx_gpu, u32 reg) +{ + return msm_readl(a6xx_gpu->llc_mmio + (reg << 2)); +} + +static inline void a6xx_llc_write(struct a6xx_gpu *a6xx_gpu, u32 reg, u32 value) +{ + msm_writel(value, a6xx_gpu->llc_mmio + (reg << 2)); +} + #define shadowptr(_a6xx_gpu, _ring) ((_a6xx_gpu)->shadow_iova + \ ((_ring)->id * sizeof(uint32_t))) |