diff options
| author | Roger Quadros <rogerq@kernel.org> | 2024-02-27 12:23:50 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2024-03-05 16:23:17 +0300 |
| commit | d78ff37567c9391a0938c5d212efec679859029b (patch) | |
| tree | 86e132143bc9425c39ff5ec4ab920c9ca19672a6 | |
| parent | 4ead695e6b3cac06543d7bc7241ab75aee4ea6a6 (diff) | |
| download | linux-d78ff37567c9391a0938c5d212efec679859029b.tar.xz | |
usb: dwc3-am62: Fix PHY core voltage selection
TRM information is outdated and design team has confirmed
that PHY_CORE_VOLTAGE should be 0 irrespective of
VDD_CORE voltage.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
Link: https://lore.kernel.org/r/20240227-for-v6-9-am62-usb-errata-3-0-v4-3-0ada8ddb0767@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| -rw-r--r-- | drivers/usb/dwc3/dwc3-am62.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/drivers/usb/dwc3/dwc3-am62.c b/drivers/usb/dwc3/dwc3-am62.c index ea6e29091c0c..09b1f5a1c4fb 100644 --- a/drivers/usb/dwc3/dwc3-am62.c +++ b/drivers/usb/dwc3/dwc3-am62.c @@ -97,7 +97,8 @@ #define USBSS_VBUS_STAT_SESSVALID BIT(2) #define USBSS_VBUS_STAT_VBUSVALID BIT(0) -/* Mask for PHY PLL REFCLK */ +/* USB_PHY_CTRL register bits in CTRL_MMR */ +#define PHY_CORE_VOLTAGE_MASK BIT(31) #define PHY_PLL_REFCLK_MASK GENMASK(3, 0) #define DWC3_AM62_AUTOSUSPEND_DELAY 100 @@ -162,6 +163,13 @@ static int phy_syscon_pll_refclk(struct dwc3_am62 *am62) am62->offset = args.args[0]; + /* Core voltage. PHY_CORE_VOLTAGE bit Recommended to be 0 always */ + ret = regmap_update_bits(am62->syscon, am62->offset, PHY_CORE_VOLTAGE_MASK, 0); + if (ret) { + dev_err(dev, "failed to set phy core voltage\n"); + return ret; + } + ret = regmap_update_bits(am62->syscon, am62->offset, PHY_PLL_REFCLK_MASK, am62->rate_code); if (ret) { dev_err(dev, "failed to set phy pll reference clock rate\n"); |