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| author | Christian König <christian.koenig@amd.com> | 2013-04-14 14:47:59 +0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2013-04-22 18:39:11 +0400 |
| commit | d7c605a20ee86a4e8f19ca7b33f7c4f7ba0468bc (patch) | |
| tree | ab429fdc575556d28e9a9b70ac0e6d043db48816 | |
| parent | a92c7d554fbfa5ec1008e4c856a2206c2cce45a4 (diff) | |
| download | linux-d7c605a20ee86a4e8f19ca7b33f7c4f7ba0468bc.tar.xz | |
drm/radeon: fix alignment of UVD fence
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_fence.c | 7 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_uvd.c | 2 |
2 files changed, 4 insertions, 5 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c index 82fe1835ff8c..1a699cefaac7 100644 --- a/drivers/gpu/drm/radeon/radeon_fence.c +++ b/drivers/gpu/drm/radeon/radeon_fence.c @@ -776,10 +776,9 @@ int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring) } else { /* put fence directly behind firmware */ - rdev->fence_drv[ring].cpu_addr = rdev->uvd.cpu_addr + - rdev->uvd_fw->size; - rdev->fence_drv[ring].gpu_addr = rdev->uvd.gpu_addr + - rdev->uvd_fw->size; + index = ALIGN(rdev->uvd_fw->size, 8); + rdev->fence_drv[ring].cpu_addr = rdev->uvd.cpu_addr + index; + rdev->fence_drv[ring].gpu_addr = rdev->uvd.gpu_addr + index; } } else { diff --git a/drivers/gpu/drm/radeon/radeon_uvd.c b/drivers/gpu/drm/radeon/radeon_uvd.c index 2fb4d6cf26b6..15580fb8546e 100644 --- a/drivers/gpu/drm/radeon/radeon_uvd.c +++ b/drivers/gpu/drm/radeon/radeon_uvd.c @@ -107,7 +107,7 @@ int radeon_uvd_init(struct radeon_device *rdev) platform_device_unregister(pdev); - bo_size = RADEON_GPU_PAGE_ALIGN(rdev->uvd_fw->size + 4) + + bo_size = RADEON_GPU_PAGE_ALIGN(rdev->uvd_fw->size + 8) + RADEON_UVD_STACK_SIZE + RADEON_UVD_HEAP_SIZE; r = radeon_bo_create(rdev, bo_size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM, NULL, &rdev->uvd.vcpu_bo); |