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authorSimon Guo <wei.guo.simon@gmail.com>2018-06-08 08:40:03 +0300
committerPaul Mackerras <paulus@ozlabs.org>2018-06-13 02:46:13 +0300
commitf61e0d3cc4aee194014074471658a5a037e311ce (patch)
tree8190e115a148df9b22b0795460d368fb2c70e6c6
parentdb96a04a86c73817b4584aa4fa2a3f60a9aa3c52 (diff)
downloadlinux-f61e0d3cc4aee194014074471658a5a037e311ce.tar.xz
KVM: PPC: Book3S PR: Fix failure status setting in tabort. emulation
tabort. will perform transaction failure recording and the recording depends on TEXASR FS bit. Currently the TEXASR FS bit is retrieved after tabort., when the TEXASR FS bit is already been updated by tabort. itself. This patch corrects this behavior by retrieving TEXASR val before tabort. tabort. will not immediately leads to transaction failure handling in suspend state. So this patch also remove the mtspr on TEXASR/TFIAR registers to avoid TM bad thing exception. Fixes: 26798f88d58d ("KVM: PPC: Book3S PR: Add emulation for tabort. in privileged state") Signed-off-by: Simon Guo <wei.guo.simon@gmail.com> Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
-rw-r--r--arch/powerpc/kvm/book3s_emulate.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/powerpc/kvm/book3s_emulate.c b/arch/powerpc/kvm/book3s_emulate.c
index 05cac5ea79c5..36b11c5a0dbb 100644
--- a/arch/powerpc/kvm/book3s_emulate.c
+++ b/arch/powerpc/kvm/book3s_emulate.c
@@ -212,9 +212,11 @@ void kvmppc_emulate_tabort(struct kvm_vcpu *vcpu, int ra_val)
* present.
*/
unsigned long guest_msr = kvmppc_get_msr(vcpu);
+ uint64_t org_texasr;
preempt_disable();
tm_enable();
+ org_texasr = mfspr(SPRN_TEXASR);
tm_abort(ra_val);
/* CR0 = 0 | MSR[TS] | 0 */
@@ -227,7 +229,7 @@ void kvmppc_emulate_tabort(struct kvm_vcpu *vcpu, int ra_val)
* and tabort will be treated as nops in non-transactional
* state.
*/
- if (!(vcpu->arch.texasr & TEXASR_FS) &&
+ if (!(org_texasr & TEXASR_FS) &&
MSR_TM_ACTIVE(guest_msr)) {
vcpu->arch.texasr &= ~(TEXASR_PR | TEXASR_HV);
if (guest_msr & MSR_PR)
@@ -237,8 +239,6 @@ void kvmppc_emulate_tabort(struct kvm_vcpu *vcpu, int ra_val)
vcpu->arch.texasr |= TEXASR_HV;
vcpu->arch.tfiar = kvmppc_get_pc(vcpu);
- mtspr(SPRN_TEXASR, vcpu->arch.texasr);
- mtspr(SPRN_TFIAR, vcpu->arch.tfiar);
}
tm_disable();
preempt_enable();