diff options
| author | GuoHua Chen <chenguohua_716@163.com> | 2024-01-11 11:56:54 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2024-01-18 23:39:55 +0300 |
| commit | f63686ce2f5e34227ce821842809e147a8121bf0 (patch) | |
| tree | 275d4f08413961d658ac0569b0acab2771e53174 | |
| parent | 8be4f5312e80c0d6617f126b7a0ff26711b87805 (diff) | |
| download | linux-f63686ce2f5e34227ce821842809e147a8121bf0.tar.xz | |
drm/radeon: Clean up errors in evergreen_reg.h
Fix the following errors reported by checkpatch:
ERROR: space prohibited before that close parenthesis ')'
ERROR: need consistent spacing around '<<' (ctx:WxV)
ERROR: need consistent spacing around '-' (ctx:WxV)
Signed-off-by: GuoHua Chen <chenguohua_716@163.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/radeon/evergreen_reg.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen_reg.h b/drivers/gpu/drm/radeon/evergreen_reg.h index b436badf9efa..3ff9fda54aa3 100644 --- a/drivers/gpu/drm/radeon/evergreen_reg.h +++ b/drivers/gpu/drm/radeon/evergreen_reg.h @@ -265,8 +265,8 @@ #define NI_DIG_BE_CNTL 0x7140 -# define NI_DIG_BE_CNTL_FE_SOURCE_SELECT(x) (((x) >> 8 ) & 0x3F) -# define NI_DIG_FE_CNTL_MODE(x) (((x) >> 16) & 0x7 ) +# define NI_DIG_BE_CNTL_FE_SOURCE_SELECT(x) (((x) >> 8) & 0x3F) +# define NI_DIG_FE_CNTL_MODE(x) (((x) >> 16) & 0x7) #define NI_DIG_BE_EN_CNTL 0x7144 # define NI_DIG_BE_EN_CNTL_ENABLE (1 << 0) @@ -284,7 +284,7 @@ #define EVERGREEN_DP_VID_STREAM_CNTL 0x730C # define EVERGREEN_DP_VID_STREAM_CNTL_ENABLE (1 << 0) -# define EVERGREEN_DP_VID_STREAM_STATUS (1 <<16) +# define EVERGREEN_DP_VID_STREAM_STATUS (1 << 16) #define EVERGREEN_DP_STEER_FIFO 0x7310 # define EVERGREEN_DP_STEER_FIFO_RESET (1 << 0) #define EVERGREEN_DP_SEC_CNTL 0x7280 @@ -302,8 +302,8 @@ # define EVERGREEN_DP_SEC_SS_EN (1 << 28) /*DCIO_UNIPHY block*/ -#define NI_DCIO_UNIPHY0_UNIPHY_TX_CONTROL1 (0x6600 -0x6600) -#define NI_DCIO_UNIPHY1_UNIPHY_TX_CONTROL1 (0x6640 -0x6600) +#define NI_DCIO_UNIPHY0_UNIPHY_TX_CONTROL1 (0x6600 - 0x6600) +#define NI_DCIO_UNIPHY1_UNIPHY_TX_CONTROL1 (0x6640 - 0x6600) #define NI_DCIO_UNIPHY2_UNIPHY_TX_CONTROL1 (0x6680 - 0x6600) #define NI_DCIO_UNIPHY3_UNIPHY_TX_CONTROL1 (0x66C0 - 0x6600) #define NI_DCIO_UNIPHY4_UNIPHY_TX_CONTROL1 (0x6700 - 0x6600) |