summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorMark Brown <broonie@kernel.org>2022-01-25 13:17:47 +0300
committerMark Brown <broonie@kernel.org>2022-01-25 13:17:47 +0300
commitf9a8f627c98b130db390b214b4fffc695824f87a (patch)
tree981b7416e11f33368f93f791c77da0ad040031ec
parent5566ccc533ab296d5270bf00c56890de3edb3bd2 (diff)
parent2da187304e556ac59cf2dacb323cc78ded988169 (diff)
downloadlinux-f9a8f627c98b130db390b214b4fffc695824f87a.tar.xz
Update the Icicle Kit device tree
Merge series from conor.dooley@microchip.com <conor.dooley@microchip.com> Conor Dooley <conor.dooley@microchip.com>: From: Conor Dooley <conor.dooley@microchip.com> This series updates the Microchip Icicle Kit device tree by adding a host of peripherals, and some updates to the memory map. In addition, the device tree has been split into a third part, which contains "soft" peripherals that are in the fpga fabric. Several of the entries are for peripherals that have not get had their drivers upstreamed, so in those cases the dt bindings are included where appropriate in order to avoid the many "DT compatible string <x> appears un-documented" errors. Depends on mpfs clock driver series [1] to provide: dt-bindings/clock/microchip,mpfs-clock.h and on the other changes to the icicle/mpfs device tree from geert that are already in linux/riscv/for-next. Additionally, the interrupt-extended warnings on the plic/clint are cleared by [2] & [3]. [1] https://lore.kernel.org/linux-clk/20211216140022.16146-1-conor.dooley@microchip.com/T/ [2] https://lore.kernel.org/linux-riscv/cover.1639744468.git.geert@linux-m68k.org/ [3] https://lore.kernel.org/linux-riscv/cover.1639744106.git.geert@linux-m68k.org/ Changes from v3: - drop "mailbox: change mailbox-mpfs compatible string", already upstream: commit f10b1fc0161cd99e - fix copy paste error in microchip,mpfs-mailbox dt-binding - remove whitespace in syscontroller dt entry Changes from v2: - dropped plic int header & corresponding defines in dts{,i} - use $ref to drmode in mpfs-musb binding - split changes to dts{,i} again: functional changes to existing elements now are in a new patch - drop num-cs property in mpfs-spi binding - dont make the system controller a simple-mfd - move the separate bindings for rng/generic system services into the system controller binding - added an instance corei2c as i2c2 in the fabric dtsi - add version numbering to corepwm and corei2c compat string (-rtl-vN) Conor Dooley (14): dt-bindings: soc/microchip: update syscontroller compatibles dt-bindings: soc/microchip: add services as children of sys ctrlr dt-bindings: i2c: add bindings for microchip mpfs i2c dt-bindings: rtc: add bindings for microchip mpfs rtc dt-bindings: gpio: add bindings for microchip mpfs gpio dt-bindings: spi: add bindings for microchip mpfs spi dt-bindings: usb: add bindings for microchip mpfs musb dt-bindings: pwm: add microchip corepwm binding riscv: dts: microchip: use clk defines for icicle kit riscv: dts: microchip: add fpga fabric section to icicle kit riscv: dts: microchip: refactor icicle kit device tree riscv: dts: microchip: update peripherals in icicle kit device tree riscv: dts: microchip: add new peripherals to icicle kit device tree MAINTAINERS: update riscv/microchip entry .../bindings/gpio/microchip,mpfs-gpio.yaml | 80 ++++++ .../bindings/i2c/microchip,mpfs-i2c.yaml | 55 ++++ ...ilbox.yaml => microchip,mpfs-mailbox.yaml} | 6 +- .../bindings/pwm/microchip,corepwm.yaml | 75 +++++ .../bindings/rtc/microchip,mfps-rtc.yaml | 63 +++++ .../microchip,mpfs-sys-controller.yaml | 73 +++++ ...icrochip,polarfire-soc-sys-controller.yaml | 35 --- .../bindings/spi/microchip,mpfs-spi.yaml | 52 ++++ .../bindings/usb/microchip,mpfs-musb.yaml | 59 ++++ MAINTAINERS | 2 + .../dts/microchip/microchip-mpfs-fabric.dtsi | 25 ++ .../microchip/microchip-mpfs-icicle-kit.dts | 115 ++++++-- .../boot/dts/microchip/microchip-mpfs.dtsi | 262 +++++++++++++++--- arch/riscv/configs/icicle_kit_defconfig | 134 +++++++++ 14 files changed, 932 insertions(+), 104 deletions(-) create mode 100644 Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml create mode 100644 Documentation/devicetree/bindings/i2c/microchip,mpfs-i2c.yaml rename Documentation/devicetree/bindings/mailbox/{microchip,polarfire-soc-mailbox.yaml => microchip,mpfs-mailbox.yaml} (82%) create mode 100644 Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml create mode 100644 Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml create mode 100644 Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml delete mode 100644 Documentation/devicetree/bindings/soc/microchip/microchip,polarfire-soc-sys-controller.yaml create mode 100644 Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml create mode 100644 Documentation/devicetree/bindings/usb/microchip,mpfs-musb.yaml create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi create mode 100644 arch/riscv/configs/icicle_kit_defconfig -- 2.32.0
-rw-r--r--Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml52
1 files changed, 52 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml b/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml
new file mode 100644
index 000000000000..ece261b8e963
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml
@@ -0,0 +1,52 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/microchip,mpfs-spi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip MPFS {Q,}SPI Controller Device Tree Bindings
+
+maintainers:
+ - Conor Dooley <conor.dooley@microchip.com>
+
+allOf:
+ - $ref: spi-controller.yaml#
+
+properties:
+ compatible:
+ enum:
+ - microchip,mpfs-spi
+ - microchip,mpfs-qspi
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clock-names:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include "dt-bindings/clock/microchip,mpfs-clock.h"
+ spi@20108000 {
+ compatible = "microchip,mpfs-spi";
+ reg = <0x20108000 0x1000>;
+ clocks = <&clkcfg CLK_SPI0>;
+ interrupt-parent = <&plic>;
+ interrupts = <54>;
+ spi-max-frequency = <25000000>;
+ };
+...