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author | Randy Dunlap <rdunlap@infradead.org> | 2023-01-27 09:39:32 +0300 |
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committer | Catalin Marinas <catalin.marinas@arm.com> | 2023-01-31 18:54:54 +0300 |
commit | a70f00e7f1a3132a2ff6f0516fe990e710ae8c1c (patch) | |
tree | b074cafbb8e9d9ea2759fd2324f322b1773ab7eb /Documentation/arm64/booting.rst | |
parent | a873bb493fb192abf7696f84ec4496c5c49a483d (diff) | |
download | linux-a70f00e7f1a3132a2ff6f0516fe990e710ae8c1c.tar.xz |
Documentation: arm64: correct spelling
Correct spelling problems for Documentation/arm64/ as reported
by codespell.
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: linux-doc@vger.kernel.org
Reviewed-by: Mukesh Ojha <quic_mojha@quicinc.com>
Link: https://lore.kernel.org/r/20230127064005.1558-3-rdunlap@infradead.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'Documentation/arm64/booting.rst')
-rw-r--r-- | Documentation/arm64/booting.rst | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/arm64/booting.rst b/Documentation/arm64/booting.rst index 96fe10ec6c24..2734fb499cdc 100644 --- a/Documentation/arm64/booting.rst +++ b/Documentation/arm64/booting.rst @@ -223,7 +223,7 @@ Before jumping into the kernel, the following conditions must be met: For systems with a GICv3 interrupt controller to be used in v3 mode: - If EL3 is present: - - ICC_SRE_EL3.Enable (bit 3) must be initialiased to 0b1. + - ICC_SRE_EL3.Enable (bit 3) must be initialised to 0b1. - ICC_SRE_EL3.SRE (bit 0) must be initialised to 0b1. - ICC_CTLR_EL3.PMHE (bit 6) must be set to the same value across all CPUs the kernel is executing on, and must stay constant |