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authorVarshini Rajendran <varshini.rajendran@microchip.com>2024-07-29 10:05:43 +0300
committerClaudiu Beznea <claudiu.beznea@tuxon.dev>2024-08-07 19:15:09 +0300
commit1afe599a0a484225bda6098feb22562831d72a4e (patch)
tree227dabc85e99610f3c1bf79f500294dc4ae25244 /Documentation/devicetree/bindings/arm
parent8400291e289ee6b2bf9779ff1c83a291501f017b (diff)
downloadlinux-1afe599a0a484225bda6098feb22562831d72a4e.tar.xz
dt-bindings: atmel-sysreg: add sam9x7
Add RAM controller & PIT64 DT bindings. Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240729070543.1990209-1-varshini.rajendran@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Diffstat (limited to 'Documentation/devicetree/bindings/arm')
-rw-r--r--Documentation/devicetree/bindings/arm/atmel-sysregs.txt6
1 files changed, 4 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
index 7374beb5a613..76e2b7978250 100644
--- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
@@ -11,7 +11,8 @@ PIT Timer required properties:
shared across all System Controller members.
PIT64B Timer required properties:
-- compatible: Should be "microchip,sam9x60-pit64b"
+- compatible: Should be "microchip,sam9x60-pit64b" or
+ "microchip,sam9x7-pit64b", "microchip,sam9x60-pit64b"
- reg: Should contain registers location and length
- interrupts: Should contain interrupt for PIT64B timer
- clocks: Should contain the available clock sources for PIT64B timer.
@@ -31,7 +32,8 @@ RAMC SDRAM/DDR Controller required properties:
"atmel,at91sam9g45-ddramc",
"atmel,sama5d3-ddramc",
"microchip,sam9x60-ddramc",
- "microchip,sama7g5-uddrc"
+ "microchip,sama7g5-uddrc",
+ "microchip,sam9x7-ddramc", "atmel,sama5d3-ddramc".
- reg: Should contain registers location and length
Examples: