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author | Joseph Lo <josephl@nvidia.com> | 2019-01-04 06:06:45 +0300 |
---|---|---|
committer | Thierry Reding <treding@nvidia.com> | 2019-02-06 16:27:37 +0300 |
commit | 73688f7d535bc3f5b0af2e3fd082a60daa2171be (patch) | |
tree | 883332360fde2e9657503076f116b5b9d3b80709 /Documentation/devicetree/bindings/cpufreq | |
parent | 7e9d10985856dcbcc8f56f97cb103eb3349b3f12 (diff) | |
download | linux-73688f7d535bc3f5b0af2e3fd082a60daa2171be.tar.xz |
dt-bindings: cpufreq: tegra124: remove vdd-cpu-supply from required properties
The Tegra124 cpufreq driver works only with DFLL clock, which is a
hardware-based frequency/voltage controller. The driver doesn't need to
control the regulator itself. Hence remove that.
Cc: devicetree@vger.kernel.org
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'Documentation/devicetree/bindings/cpufreq')
-rw-r--r-- | Documentation/devicetree/bindings/cpufreq/nvidia,tegra124-cpufreq.txt | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/cpufreq/nvidia,tegra124-cpufreq.txt b/Documentation/devicetree/bindings/cpufreq/nvidia,tegra124-cpufreq.txt index b1669fbfb740..031545a29caf 100644 --- a/Documentation/devicetree/bindings/cpufreq/nvidia,tegra124-cpufreq.txt +++ b/Documentation/devicetree/bindings/cpufreq/nvidia,tegra124-cpufreq.txt @@ -13,7 +13,6 @@ Required properties: - pll_x: Fast PLL clocksource. - pll_p: Auxiliary PLL used during fast PLL rate changes. - dfll: Fast DFLL clocksource that also automatically scales CPU voltage. -- vdd-cpu-supply: Regulator for CPU voltage Optional properties: - clock-latency: Specify the possible maximum transition latency for clock, @@ -37,7 +36,6 @@ cpus { <&dfll>; clock-names = "cpu_g", "cpu_lp", "pll_x", "pll_p", "dfll"; clock-latency = <300000>; - vdd-cpu-supply: <&vdd_cpu>; }; <...> |