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author | Cristian Ciocaltea <cristian.ciocaltea@gmail.com> | 2020-09-14 23:27:17 +0300 |
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committer | Marc Zyngier <maz@kernel.org> | 2020-09-25 18:57:33 +0300 |
commit | b2bd271c3961f35dd127c99c8f576d9fcc2cb0c4 (patch) | |
tree | a78d2553f9b5a5cc58eff4b3454579208b583b51 /Documentation/devicetree/bindings/interrupt-controller | |
parent | f4d51dffc6c01a9e94650d95ce0104964f8ae822 (diff) | |
download | linux-b2bd271c3961f35dd127c99c8f576d9fcc2cb0c4.tar.xz |
dt-bindings: interrupt-controller: Add Actions SIRQ controller binding
Actions Semi Owl SoCs SIRQ interrupt controller is found in S500, S700
and S900 SoCs and provides support for handling up to 3 external
interrupt lines.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/c2046b747574ea56c1cf05c05b402c7f01d5e4fc.1600114378.git.cristian.ciocaltea@gmail.com
Diffstat (limited to 'Documentation/devicetree/bindings/interrupt-controller')
-rw-r--r-- | Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml b/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml new file mode 100644 index 000000000000..5da333c644c9 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/actions,owl-sirq.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Actions Semi Owl SoCs SIRQ interrupt controller + +maintainers: + - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + - Cristian Ciocaltea <cristian.ciocaltea@gmail.com> + +description: | + This interrupt controller is found in the Actions Semi Owl SoCs (S500, S700 + and S900) and provides support for handling up to 3 external interrupt lines. + +properties: + compatible: + enum: + - actions,s500-sirq + - actions,s700-sirq + - actions,s900-sirq + + reg: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 2 + description: + The first cell is the input IRQ number, between 0 and 2, while the second + cell is the trigger type as defined in interrupt.txt in this directory. + + 'interrupts': + description: | + Contains the GIC SPI IRQs mapped to the external interrupt lines. + They shall be specified sequentially from output 0 to 2. + minItems: 3 + maxItems: 3 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + - 'interrupts' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + sirq: interrupt-controller@b01b0200 { + compatible = "actions,s500-sirq"; + reg = <0xb01b0200 0x4>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, /* SIRQ0 */ + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, /* SIRQ1 */ + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; /* SIRQ2 */ + }; + +... |