Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM Devicetree updates from Olof Johansson:
 "As usual, most of the changes are to devicetrees.

  Besides smaller fixes, some refactorings and cleanups, some of the new
  platforms and chips (or significant features) supported are below:

  Broadcom boards:
   - Cisco Meraki MR32 (BCM53016-based)
   - BCM2711 (RPi4) display pipeline support

  Actions Semi boards:
   - Caninos Loucos Labrador SBC (S500-based)
   - RoseapplePi SBC (S500-based)

  Allwinner SoCs/boards:
   - A100 SoC with Perf1 board
   - Mali, DMA, Cetrus and IR support for R40 SoC

  Amlogic boards:
   - Libretch S905x CC V2 board
   - Hardkernel ODROID-N2+ board

  Aspeed boards/platforms:
   - Wistron Mowgli (AST2500-based, Power9 OpenPower server)
   - Facebook Wedge400 (AST2500-based, ToR switch)

  Hisilicon SoC:
   - SD5203 SoC

  Nvidia boards:
   - Tegra234 VDK, for pre-silicon Orin SoC

  NXP i.MX boards:
   - Librem 5 phone
   - i.MX8MM DDR4 EVK
   - Variscite VAR-SOM-MX8MN SoM
   - Symphony board
   - Tolino Shine 2 HD
   - TQMa6 SoM
   - Y Soft IOTA Orion

  Rockchip boards:
   - NanoPi R2S board
   - A95X-Z2 board
   - more Rock-Pi4 variants

  STM32 boards:
   - Odyssey SOM board (STM32MP157CAC-based)
   - DH DRC02 board

  Toshiba SoCs/boards:
   - Visconti SoC and TPMV7708 board"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (638 commits)
  ARM: dts: nspire: Fix SP804 users
  arm64: dts: lg: Fix SP804 users
  arm64: dts: lg: Fix SP805 clocks
  ARM: mstar: Fix up the fallout from moving the dts/dtsi files
  ARM: mstar: Add mstar prefix to all of the dtsi/dts files
  ARM: mstar: Add interrupt to pm_uart
  ARM: mstar: Add interrupt controller to base dtsi
  ARM: dts: meson8: remove two invalid interrupt lines from the GPU node
  arm64: dts: ti: k3-j7200-common-proc-board: Add USB support
  arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane function
  arm64: dts: ti: k3-j7200-main: Add USB controller
  arm64: dts: ti: k3-j7200-main.dtsi: Add USB to SERDES lane MUX
  arm64: dts: ti: k3-j7200-main: Add SERDES lane control mux
  dt-bindings: ti-serdes-mux: Add defines for J7200 SoC
  ARM: dts: hisilicon: add SD5203 dts
  ARM: dts: hisilicon: fix the system controller compatible nodes
  arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1
  arm64: dts: zynqmp: Remove undocumented u-boot properties
  arm64: dts: zynqmp: Remove additional compatible string for i2c IPs
  arm64: dts: zynqmp: Rename buses to be align with simple-bus yaml
  ...

2 files changed, 13 insertions, 8 deletions

diff --git a/Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt b/Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt
index 892ba4384abc..43d777ed8316 100644
--- a/Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt
+++ b/Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt
@@ -1,11 +1,13 @@
-NVIDIA Tegra186 MISC register block
+NVIDIA Tegra186 (and later) MISC register block
 
-The MISC register block found on Tegra186 SoCs contains registers that can be
-used to identify a given chip and various strapping options.
+The MISC register block found on Tegra186 and later SoCs contains registers
+that can be used to identify a given chip and various strapping options.
 
 Required properties:
 - compatible: Must be:
   - Tegra186: "nvidia,tegra186-misc"
+  - Tegra194: "nvidia,tegra194-misc"
+  - Tegra234: "nvidia,tegra234-misc"
 - reg: Should contain 2 entries: The first entry gives the physical address
        and length of the register region which contains revision and debug
        features. The second entry specifies the physical address and length
diff --git a/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt b/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt
index 4556359c5876..83f6a251ba3e 100644
--- a/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt
+++ b/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt
@@ -1,10 +1,13 @@
-NVIDIA Tegra20/Tegra30/Tegr114/Tegra124 apbmisc block
+NVIDIA Tegra APBMISC block
 
 Required properties:
-- compatible : For Tegra20, must be "nvidia,tegra20-apbmisc".  For Tegra30,
-  must be "nvidia,tegra30-apbmisc".  Otherwise, must contain
-  "nvidia,<chip>-apbmisc", plus one of the above, where <chip> is tegra114,
-  tegra124, tegra132.
+- compatible: Must be:
+  - Tegra20: "nvidia,tegra20-apbmisc"
+  - Tegra30: "nvidia,tegra30-apbmisc", "nvidia,tegra20-apbmisc"
+  - Tegra114: "nvidia,tegra114-apbmisc", "nvidia,tegra20-apbmisc"
+  - Tegra124: "nvidia,tegra124-apbmisc", "nvidia,tegra20-apbmisc"
+  - Tegra132: "nvidia,tegra124-apbmisc", "nvidia,tegra20-apbmisc"
+  - Tegra210: "nvidia,tegra210-apbmisc", "nvidia,tegra20-apbmisc"
 - reg: Should contain 2 entries: the first entry gives the physical address
        and length of the registers which contain revision and debug features.
        The second entry gives the physical address and length of the