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authorYang Xiwen <forbidden405@outlook.com>2024-02-29 04:36:22 +0300
committerUlf Hansson <ulf.hansson@linaro.org>2024-03-05 15:01:53 +0300
commitcddacdce8ffb168d6cc5ffd0bd5a55153e528135 (patch)
tree80ac38e26b13f29d12b5d9ec1da50b1c0343cded /Documentation/devicetree/bindings/mmc
parent832ff3126527339160990e99c1cbc7a5ddc0576c (diff)
downloadlinux-cddacdce8ffb168d6cc5ffd0bd5a55153e528135.tar.xz
dt-bindings: mmc: hisilicon,hi3798cv200-dw-mshc: add Hi3798MV200 binding
Add binding and an extra property for Hi3798MV200 DWMMC specific extension. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Yang Xiwen <forbidden405@outlook.com> Link: https://lore.kernel.org/r/20240229-b4-mmc-hi3798mv200-v7-4-10c03f316285@outlook.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/mmc')
-rw-r--r--Documentation/devicetree/bindings/mmc/hisilicon,hi3798cv200-dw-mshc.yaml24
1 files changed, 23 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/mmc/hisilicon,hi3798cv200-dw-mshc.yaml b/Documentation/devicetree/bindings/mmc/hisilicon,hi3798cv200-dw-mshc.yaml
index f3dc973cb490..41c9b22523e7 100644
--- a/Documentation/devicetree/bindings/mmc/hisilicon,hi3798cv200-dw-mshc.yaml
+++ b/Documentation/devicetree/bindings/mmc/hisilicon,hi3798cv200-dw-mshc.yaml
@@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/mmc/hisilicon,hi3798cv200-dw-mshc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Hisilicon Hi3798CV200 SoC specific extensions to the Synopsys DWMMC controller
+title: Hisilicon HiSTB SoCs specific extensions to the Synopsys DWMMC controller
maintainers:
- Yang Xiwen <forbidden405@outlook.com>
@@ -13,6 +13,7 @@ properties:
compatible:
enum:
- hisilicon,hi3798cv200-dw-mshc
+ - hisilicon,hi3798mv200-dw-mshc
reg:
maxItems: 1
@@ -34,6 +35,15 @@ properties:
- const: ciu-sample
- const: ciu-drive
+ hisilicon,sap-dll-reg:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description: |
+ DWMMC core on Hi3798MV2x SoCs has a delay-locked-loop(DLL) attached to card data input path.
+ It is integrated into CRG core on the SoC and has to be controlled during tuning.
+ items:
+ - description: A phandle pointed to the CRG syscon node
+ - description: Sample DLL register offset in CRG address space
+
required:
- compatible
- reg
@@ -44,6 +54,18 @@ required:
allOf:
- $ref: synopsys-dw-mshc-common.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: hisilicon,hi3798mv200-dw-mshc
+ then:
+ required:
+ - hisilicon,sap-dll-reg
+ else:
+ properties:
+ hisilicon,sap-dll-reg: false
+
unevaluatedProperties: false
examples: