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author | Rob Herring <robh@kernel.org> | 2020-03-10 22:32:14 +0300 |
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committer | Rob Herring <robh@kernel.org> | 2020-03-10 22:32:14 +0300 |
commit | eb32d1e45ecdc92b19bcbeae0a98c905820a780b (patch) | |
tree | 7cba65bb6ff5a2437b52dfc0de8abc0e6d9eb2a7 /Documentation/devicetree/bindings/mtd | |
parent | f15652859cbe34ec4f3667169facd86309f438d2 (diff) | |
parent | d2334a91a3b01dce4f290b4536fcfa4b9e923a3d (diff) | |
download | linux-eb32d1e45ecdc92b19bcbeae0a98c905820a780b.tar.xz |
Merge branch 'dt/linus' into dt/next
Diffstat (limited to 'Documentation/devicetree/bindings/mtd')
-rw-r--r-- | Documentation/devicetree/bindings/mtd/cadence-nand-controller.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/mtd/cadence-nand-controller.txt b/Documentation/devicetree/bindings/mtd/cadence-nand-controller.txt index f3893c4d3c6a..d2eada5044b2 100644 --- a/Documentation/devicetree/bindings/mtd/cadence-nand-controller.txt +++ b/Documentation/devicetree/bindings/mtd/cadence-nand-controller.txt @@ -27,7 +27,7 @@ Required properties of NAND chips: - reg: shall contain the native Chip Select ids from 0 to max supported by the cadence nand flash controller -See Documentation/devicetree/bindings/mtd/nand.txt for more details on +See Documentation/devicetree/bindings/mtd/nand-controller.yaml for more details on generic bindings. Example: |