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author | Robert Hancock <robert.hancock@calian.com> | 2021-02-13 03:23:55 +0300 |
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committer | David S. Miller <davem@davemloft.net> | 2021-02-13 04:38:53 +0300 |
commit | eceac9d2590bfcca25d28bd34ac3294dbb73c8ff (patch) | |
tree | c5b770bba239f66870f31a25ff8bdb1027c521b4 /Documentation/devicetree/bindings/net/xilinx_axienet.txt | |
parent | 66b51663cdd07397510a24cef29bd56956d5e9d3 (diff) | |
download | linux-eceac9d2590bfcca25d28bd34ac3294dbb73c8ff.tar.xz |
dt-bindings: net: xilinx_axienet: add xlnx,switch-x-sgmii attribute
Document the new xlnx,switch-x-sgmii attribute which is used to indicate
that the Ethernet core supports dynamic switching between 1000BaseX and
SGMII.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'Documentation/devicetree/bindings/net/xilinx_axienet.txt')
-rw-r--r-- | Documentation/devicetree/bindings/net/xilinx_axienet.txt | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/net/xilinx_axienet.txt b/Documentation/devicetree/bindings/net/xilinx_axienet.txt index 7360617cdedb..2cd452419ed0 100644 --- a/Documentation/devicetree/bindings/net/xilinx_axienet.txt +++ b/Documentation/devicetree/bindings/net/xilinx_axienet.txt @@ -38,6 +38,10 @@ Optional properties: 1 to enable partial TX checksum offload, 2 to enable full TX checksum offload - xlnx,rxcsum : Same values as xlnx,txcsum but for RX checksum offload +- xlnx,switch-x-sgmii : Boolean to indicate the Ethernet core is configured to + support both 1000BaseX and SGMII modes. If set, the phy-mode + should be set to match the mode selected on core reset (i.e. + by the basex_or_sgmii core input line). - clocks : AXI bus clock for the device. Refer to common clock bindings. Used to calculate MDIO clock divisor. If not specified, it is auto-detected from the CPU clock (but only on platforms where |