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authorVidya Sagar <vidyas@nvidia.com>2019-08-13 14:36:21 +0300
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>2019-08-13 17:53:31 +0300
commitf4e84a5d9db7dfea96832157bc461177e87a47dd (patch)
treec3ce9fad80a5a6f6c6adbdf334f21a8ccacb59f5 /Documentation/devicetree/bindings/pci
parentfeee519ae55c8859a50eca0da83b1ef4ea45f65d (diff)
downloadlinux-f4e84a5d9db7dfea96832157bc461177e87a47dd.tar.xz
dt-bindings: PCI: designware: Add binding for CDM register check
Add support to enable CDM (Configuration Dependent Module) registers check for any data corruption. CDM registers include standard PCIe configuration space registers, Port Logic registers and iATU and DMA registers. Refer Section S.4 of Synopsys DesignWare Cores PCI Express Controller Databook Version 4.90a. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/pci')
-rw-r--r--Documentation/devicetree/bindings/pci/designware-pcie.txt5
1 files changed, 5 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt
index 5561a1c060d0..3fba04da6a59 100644
--- a/Documentation/devicetree/bindings/pci/designware-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt
@@ -34,6 +34,11 @@ Optional properties:
- clock-names: Must include the following entries:
- "pcie"
- "pcie_bus"
+- snps,enable-cdm-check: This is a boolean property and if present enables
+ automatic checking of CDM (Configuration Dependent Module) registers
+ for data corruption. CDM registers include standard PCIe configuration
+ space registers, Port Logic registers, DMA and iATU (internal Address
+ Translation Unit) registers.
RC mode:
- num-viewport: number of view ports configured in hardware. If a platform
does not specify it, the driver assumes 2.