diff options
author | Ji Sheng Teoh <jisheng.teoh@starfivetech.com> | 2024-02-29 10:27:18 +0300 |
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committer | Will Deacon <will@kernel.org> | 2024-03-04 17:19:48 +0300 |
commit | 66461b43b0c05da2e7c606b9eea7f1f3b565b9c3 (patch) | |
tree | 91c5d7dd7f48d2d80470611a2a0bf31aa1240aa8 /Documentation/devicetree/bindings/perf | |
parent | c2b24812f7bc5fbd6f2f92af070856fbe4c37b40 (diff) | |
download | linux-66461b43b0c05da2e7c606b9eea7f1f3b565b9c3.tar.xz |
dt-bindings: perf: starfive: Add JH8100 StarLink PMU
Add device tree binding for StarFive's JH8100 StarLink PMU (Performance
Monitor Unit).
Signed-off-by: Ji Sheng Teoh <jisheng.teoh@starfivetech.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240229072720.3987876-3-jisheng.teoh@starfivetech.com
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/perf')
-rw-r--r-- | Documentation/devicetree/bindings/perf/starfive,jh8100-starlink-pmu.yaml | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/perf/starfive,jh8100-starlink-pmu.yaml b/Documentation/devicetree/bindings/perf/starfive,jh8100-starlink-pmu.yaml new file mode 100644 index 000000000000..915c6b814026 --- /dev/null +++ b/Documentation/devicetree/bindings/perf/starfive,jh8100-starlink-pmu.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/perf/starfive,jh8100-starlink-pmu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: StarFive JH8100 StarLink PMU + +maintainers: + - Ji Sheng Teoh <jisheng.teoh@starfivetech.com> + +description: + StarFive's JH8100 StarLink PMU integrates one or more CPU cores with a + shared L3 memory system. The PMU support overflow interrupt, up to + 16 programmable 64bit event counters, and an independent 64bit cycle + counter. StarFive's JH8100 StarLink PMU is accessed via MMIO. + +properties: + compatible: + const: starfive,jh8100-starlink-pmu + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + + pmu@12900000 { + compatible = "starfive,jh8100-starlink-pmu"; + reg = <0x0 0x12900000 0x0 0x10000>; + interrupts = <34>; + }; + }; |