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authorMarcel Ziswiler <marcel.ziswiler@toradex.com>2018-02-22 17:38:25 +0300
committerThierry Reding <treding@nvidia.com>2018-03-08 17:09:36 +0300
commita7ca2a709dbce8ef712fc829f686672d0c0256bf (patch)
tree935e5bd38659835421b570f8215c94c207106098 /Documentation/devicetree/bindings/phy
parentff0286cbccacc300f4fb47c60a9e5629889dda04 (diff)
downloadlinux-a7ca2a709dbce8ef712fc829f686672d0c0256bf.tar.xz
dt-bindings: phy: Clarify ULPI PHY source clock
cdev2 is not actually a clock on Tegra20 but rather a pinmux pad group. PLL_P_OUT4 is the source clock for the ULPI PHY and is output to the DAP_MCLK2 pad. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'Documentation/devicetree/bindings/phy')
-rw-r--r--Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.txt4
1 files changed, 3 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.txt b/Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.txt
index a9aa79fb90ed..1aa6f2674af5 100644
--- a/Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.txt
+++ b/Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.txt
@@ -21,7 +21,9 @@ Required properties :
- timer: The timeout clock (clk_m). Present if phy_type == utmi.
- utmi-pads: The clock needed to access the UTMI pad control registers.
Present if phy_type == utmi.
- - ulpi-link: The clock Tegra provides to the ULPI PHY (cdev2).
+ - ulpi-link: The clock Tegra provides to the ULPI PHY (usually pad DAP_MCLK2
+ with pad group aka "nvidia,pins" cdev2 and pin mux option config aka
+ "nvidia,function" pllp_out4).
Present if phy_type == ulpi, and ULPI link mode is in use.
- resets : Must contain an entry for each entry in reset-names.
See ../reset/reset.txt for details.