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authorAlexandre Belloni <alexandre.belloni@free-electrons.com>2014-12-18 00:15:40 +0300
committerThierry Reding <thierry.reding@gmail.com>2015-01-30 14:16:02 +0300
commited73598531337bce238915280396c8e0dcee93bc (patch)
treee3785c598eae9d07739b9d101ca79e74b6c423c8 /Documentation/devicetree/bindings/pwm
parent09853ce7bc1003a490c7ee74a5705d7a7cf16b7d (diff)
downloadlinux-ed73598531337bce238915280396c8e0dcee93bc.tar.xz
pwm: sunxi: document OF bindings
This is the documentation for the Allwinner SoCs PWM bindings. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
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+Allwinner sun4i and sun7i SoC PWM controller
+
+Required properties:
+ - compatible: should be one of:
+ - "allwinner,sun4i-a10-pwm"
+ - "allwinner,sun7i-a20-pwm"
+ - reg: physical base address and length of the controller's registers
+ - #pwm-cells: should be 3. See pwm.txt in this directory for a description of
+ the cells format.
+ - clocks: From common clock binding, handle to the parent clock.
+
+Example:
+
+ pwm: pwm@01c20e00 {
+ compatible = "allwinner,sun7i-a20-pwm";
+ reg = <0x01c20e00 0xc>;
+ clocks = <&osc24M>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };