diff options
| author | Bjorn Helgaas <bhelgaas@google.com> | 2023-08-15 00:28:21 +0300 |
|---|---|---|
| committer | Rob Herring <robh@kernel.org> | 2023-08-18 19:32:25 +0300 |
| commit | 47aab53331effedd3f5a6136854bd1da011f94b6 (patch) | |
| tree | 97a28f7bbcbf3f908494643bd685d4cbc626bc08 /Documentation/devicetree/bindings/soc | |
| parent | de259b7bd6bee317c8ae9e6324be6fd3b89e1930 (diff) | |
| download | linux-47aab53331effedd3f5a6136854bd1da011f94b6.tar.xz | |
dt-bindings: Fix typos
Fix typos in Documentation/devicetree/bindings. The changes are in
descriptions or comments where they shouldn't affect functionality.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20230814212822.193684-3-helgaas@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/soc')
3 files changed, 3 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt7986-wo-ccif.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt7986-wo-ccif.yaml index 8e6ba2ec8a43..f0fa92b04b32 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt7986-wo-ccif.yaml +++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt7986-wo-ccif.yaml @@ -12,7 +12,7 @@ maintainers: description: The MediaTek wo-ccif provides a configuration interface for WED WO - controller used to perfrom offload rx packet processing (e.g. 802.11 + controller used to perform offload rx packet processing (e.g. 802.11 aggregation packet reordering or rx header translation) on MT7986 soc. properties: diff --git a/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml index 04ffee3a7c59..365a9fed5914 100644 --- a/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml +++ b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml @@ -12,7 +12,7 @@ maintainers: description: | PolarFire SoC devices include a microcontroller acting as the system controller, which provides "services" to the main processor and to the FPGA fabric. These - services include hardware rng, reprogramming of the FPGA and verfification of the + services include hardware rng, reprogramming of the FPGA and verification of the eNVM contents etc. More information on these services can be found online, at https://onlinedocs.microchip.com/pr/GUID-1409CF11-8EF9-4C24-A94E-70979A688632-en-US-1/index.html diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml index 9dc8e48c8af4..d1c7c2be865f 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml @@ -77,7 +77,7 @@ patternProperties: description: The AOSS side channel also provides the controls for three cooling devices, these are expressed as subnodes of the QMP node. The name of the node is - used to identify the resource and must therefor be "cx", "mx" or "ebi". + used to identify the resource and must therefore be "cx", "mx" or "ebi". properties: "#cooling-cells": |