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authorDaniel Mack <zonque@gmail.com>2013-03-08 16:52:09 +0400
committerMark Brown <broonie@opensource.wolfsonmicro.com>2013-03-08 17:06:09 +0400
commit4fa89346fbc34750f96ec0c1b2b59b15596ab333 (patch)
treec80ee94c50794cddb9baae41d482f8882aa0b118 /Documentation/devicetree/bindings/sound/ti,tas5086.txt
parent6dbe51c251a327e012439c4772097a13df43c5b8 (diff)
downloadlinux-4fa89346fbc34750f96ec0c1b2b59b15596ab333.tar.xz
ALSA: ASoC: add codec driver for TI TAS5086
This patch adds a driver for TI's TA5086 6-channel PWM processor. This chip has a very unusual register layout, specifically because the registers are of unequal size, and multi-byte registers require bulk writes to take effect. Regmap does not support these kind of mappings. Currently, the driver does not touch any of the registers >= 0x20, so it doesn't matter, because the register map is mapped to an 8-bit array. In case more features will be added in the future that require access to higher registers, the entire regmap H/W I/O routines have to be open-coded. Signed-off-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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+Texas Instruments TAS5086 6-channel PWM Processor
+
+Required properties:
+
+ - compatible: Should contain "ti,tas5086".
+ - reg: The i2c address. Should contain <0x1b>.
+
+Optional properties:
+
+ - reset-gpio: A GPIO spec to define which pin is connected to the
+ chip's !RESET pin. If specified, the driver will
+ assert a hardware reset at probe time.
+
+ - ti,charge-period: This property should contain the time in microseconds
+ that closely matches the external single-ended
+ split-capacitor charge period. The hardware chip
+ waits for this period of time before starting the
+ PWM signals. This helps reduce pops and clicks.
+
+ When not specified, the hardware default of 1300ms
+ is retained.
+
+Examples:
+
+ i2c_bus {
+ tas5086@1b {
+ compatible = "ti,tas5086";
+ reg = <0x1b>;
+ reset-gpio = <&gpio 23 0>;
+ ti,charge-period = <156000>;
+ };
+ };