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authorGilad Avidov <gavidov@codeaurora.org>2015-03-25 20:37:32 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-03-27 01:51:36 +0300
commitd0c6ae41d12ad7b2ba271f279936327320b6671c (patch)
treeadd5d2166f09fa4b00c0e9309810841275a124f9 /Documentation/devicetree/bindings/spmi
parent0b9641f5722a9c08cacb534d633ff469ab02a288 (diff)
downloadlinux-d0c6ae41d12ad7b2ba271f279936327320b6671c.tar.xz
spmi: pmic_arb: add support for hw version 2
Qualcomm PMIC Arbiter version-2 changes from version-1 are: - Some different register offsets. - New channel register space, one per PMIC peripheral (ppid). All tx traffic uses these channels. - New observer register space. All rx trafic uses this space. - Different command format for spmi command registers. Reviewed-by: Sagar Dharia <sdharia@codeaurora.org> Signed-off-by: Gilad Avidov <gavidov@codeaurora.org> Tested-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation/devicetree/bindings/spmi')
-rw-r--r--Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt6
1 files changed, 5 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt b/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt
index 715d0998af8e..e16b9b5afc70 100644
--- a/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt
+++ b/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt
@@ -1,6 +1,6 @@
Qualcomm SPMI Controller (PMIC Arbiter)
-The SPMI PMIC Arbiter is found on the Snapdragon 800 Series. It is an SPMI
+The SPMI PMIC Arbiter is found on Snapdragon chipsets. It is an SPMI
controller with wrapping arbitration logic to allow for multiple on-chip
devices to control a single SPMI master.
@@ -19,6 +19,10 @@ Required properties:
"core" - core registers
"intr" - interrupt controller registers
"cnfg" - configuration registers
+ Registers used only for V2 PMIC Arbiter:
+ "chnls" - tx-channel per virtual slave registers.
+ "obsrvr" - rx-channel (called observer) per virtual slave registers.
+
- reg : address + size pairs describing the PMIC arb register sets; order must
correspond with the order of entries in reg-names
- #address-cells : must be set to 2