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authorGeert Uytterhoeven <geert+renesas@glider.be>2017-06-02 15:38:46 +0300
committerMichael Ellerman <mpe@ellerman.id.au>2018-01-21 21:48:34 +0300
commit4be4119d1fbd93c44d5c639735c3124d0526976c (patch)
tree8648c94a6329a36b2344decb7d6132f13da36fbc /Documentation/devicetree/booting-without-of.txt
parent8d1915873d492b8e1f03bbcab527db62a8d49542 (diff)
downloadlinux-4be4119d1fbd93c44d5c639735c3124d0526976c.tar.xz
dt: booting-without-of: DT fix s/#interrupt-cell/#interrupt-cells/
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'Documentation/devicetree/booting-without-of.txt')
-rw-r--r--Documentation/devicetree/booting-without-of.txt2
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/devicetree/booting-without-of.txt b/Documentation/devicetree/booting-without-of.txt
index 417f91110010..e86bd2f64117 100644
--- a/Documentation/devicetree/booting-without-of.txt
+++ b/Documentation/devicetree/booting-without-of.txt
@@ -1309,7 +1309,7 @@ number and level/sense information. All interrupt children in an
OpenPIC interrupt domain use 2 cells per interrupt in their interrupts
property.
-The PCI bus binding specifies a #interrupt-cell value of 1 to encode
+The PCI bus binding specifies a #interrupt-cells value of 1 to encode
which interrupt pin (INTA,INTB,INTC,INTD) is used.
2) interrupt-parent property