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| author | Rahul Rameshbabu <rrameshbabu@nvidia.com> | 2023-06-13 00:14:53 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2023-06-20 11:02:32 +0300 |
| commit | fe3834cd0cf74b06847a1001ac44b7e2c035b5bc (patch) | |
| tree | 3125345818bb21e75ecbf82d840dd83277079cde /Documentation/driver-api | |
| parent | a05d070a6164bd0578991e42181a52b9c7cf630c (diff) | |
| download | linux-fe3834cd0cf74b06847a1001ac44b7e2c035b5bc.tar.xz | |
docs: ptp.rst: Add information about NVIDIA Mellanox devices
The mlx5_core driver has implemented ptp clock driver functionality but
lacked documentation about the PTP devices. This patch adds information
about the Mellanox device family.
Signed-off-by: Rahul Rameshbabu <rrameshbabu@nvidia.com>
Acked-by: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'Documentation/driver-api')
| -rw-r--r-- | Documentation/driver-api/ptp.rst | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/Documentation/driver-api/ptp.rst b/Documentation/driver-api/ptp.rst index 4552a1f20488..5e033c3b11b3 100644 --- a/Documentation/driver-api/ptp.rst +++ b/Documentation/driver-api/ptp.rst @@ -122,3 +122,16 @@ Supported hardware - LPF settings (bandwidth, phase limiting, automatic holdover, physical layer assist (per ITU-T G.8273.2)) - Programmable output PTP clocks, any frequency up to 1GHz (to other PHY/MAC time stampers, refclk to ASSPs/SoCs/FPGAs) - Lock to GNSS input, automatic switching between GNSS and user-space PHC control (optional) + + * NVIDIA Mellanox + + - GPIO + - Certain variants of ConnectX-6 Dx and later products support one + GPIO which can time stamp external triggers and one GPIO to produce + periodic signals. + - Certain variants of ConnectX-5 and older products support one GPIO, + configured to either time stamp external triggers or produce + periodic signals. + - PHC instances + - All ConnectX devices have a free-running counter + - ConnectX-6 Dx and later devices have a UTC format counter |