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| author | Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> | 2022-11-08 05:06:00 +0300 |
|---|---|---|
| committer | Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> | 2022-11-14 21:11:47 +0300 |
| commit | a187f13d51fa0da0005003a63d3f7eb4c1d466b4 (patch) | |
| tree | 8ef5b55118cb564241070d5b20bb4428bd85c066 /Documentation/gpu | |
| parent | b910f716f6ef78f0c06f6e53d0a48966366b11af (diff) | |
| download | linux-a187f13d51fa0da0005003a63d3f7eb4c1d466b4.tar.xz | |
drm/i915/guc: handle interrupts from media GuC
The render and media GuCs share the same interrupt enable register, so
we can no longer disable interrupts when we disable communication for
one of the GuCs as this would impact the other GuC. Instead, we keep the
interrupts always enabled in HW and use a variable in the GuC structure
to determine if we want to service the received interrupts or not.
v2: use MTL_ prefix for reg definition (Matt)
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221108020600.3575467-7-daniele.ceraolospurio@intel.com
Diffstat (limited to 'Documentation/gpu')
0 files changed, 0 insertions, 0 deletions