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authorHans de Goede <hdegoede@redhat.com>2011-03-09 22:57:14 +0300
committerGuenter Roeck <guenter.roeck@ericsson.com>2011-03-15 08:39:25 +0300
commit3cad402281607d4db0d99d88fbd67cabb7c5b9f1 (patch)
tree81147d3ef8f5a8d6230ae531d00e929a887a77fa /Documentation/hwmon
parente48a7f1a719b258ee8bd2e809205d6d0f9d66aed (diff)
downloadlinux-3cad402281607d4db0d99d88fbd67cabb7c5b9f1.tar.xz
hwmon/f71882fg: Add support for f71889ed
Note that this patch also makes 2 changes to the code paths for the f71889fg to keep the code unified between the 2 (for simplicities sake). Both of these are harmless for then f71889fg: 1) The first change is to always set the FAN_PROG_SEL bit to 0. This influences accesses to some banked fan / pwm registers. On the f71889fg no registers which we use are banked. On the f71889ed however some more fan registers have been banked including one which we use, by making the FAN_PROG_SEL bit 0, address 0x96 will point to the right register. 2) The second change is to see a FANx_TEMP_SEL value of 0 as pointing to a PECI / AMDSI value, and thus disable our pwm related sysfs attr. This is correct for the f71889ed and on the f71889fg 0 is a reserved value, so we should never see it and if we do, disabling the pwm related sysfs attr is a sane thing to do. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Tested-by: Thomas Greve <tg42@gmx.net> Tested-by: Sander Eikelenboom <linux@eikelenboom.it> Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Diffstat (limited to 'Documentation/hwmon')
-rw-r--r--Documentation/hwmon/f71882fg12
1 files changed, 8 insertions, 4 deletions
diff --git a/Documentation/hwmon/f71882fg b/Documentation/hwmon/f71882fg
index a7952c2bd959..9aa210cae695 100644
--- a/Documentation/hwmon/f71882fg
+++ b/Documentation/hwmon/f71882fg
@@ -17,6 +17,10 @@ Supported chips:
* Fintek F71889FG
Prefix: 'f71889fg'
Addresses scanned: none, address read from Super I/O config space
+ Datasheet: Available from the Fintek website
+ * Fintek F71889ED
+ Prefix: 'f71889ed'
+ Addresses scanned: none, address read from Super I/O config space
Datasheet: Should become available on the Fintek website soon
* Fintek F8000
Prefix: 'f8000'
@@ -29,9 +33,9 @@ Author: Hans de Goede <hdegoede@redhat.com>
Description
-----------
-Fintek F718xxFG/F8000 Super I/O chips include complete hardware monitoring
-capabilities. They can monitor up to 9 voltages (3 for the F8000), 4 fans and
-3 temperature sensors.
+Fintek F718xx/F8000 Super I/O chips include complete hardware monitoring
+capabilities. They can monitor up to 9 voltages, 4 fans and 3 temperature
+sensors.
These chips also have fan controlling features, using either DC or PWM, in
three different modes (one manual, two automatic).
@@ -99,5 +103,5 @@ Writing an unsupported mode will result in an invalid parameter error.
The fan speed is regulated to keep the temp the fan is mapped to between
temp#_auto_point2_temp and temp#_auto_point3_temp.
-Both of the automatic modes require that pwm1 corresponds to fan1, pwm2 to
+All of the automatic modes require that pwm1 corresponds to fan1, pwm2 to
fan2 and pwm3 to fan3.