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authorWolfram Sang <wsa@the-dreams.de>2019-05-03 16:20:04 +0300
committerWolfram Sang <wsa@the-dreams.de>2019-05-03 16:20:58 +0300
commitd00afd5ede1c29a6dc59be2d7fb7d6ef28eb85c5 (patch)
treee194b1968e54380a6654abf7d3a037ca0a010280 /Documentation/i2c/busses
parent9a51b86a61214a297cdfc1bb705b7267f9455ae6 (diff)
parentd5984d2a312144bedccf32aea2298f8df05bb617 (diff)
downloadlinux-d00afd5ede1c29a6dc59be2d7fb7d6ef28eb85c5.tar.xz
Merge branch 'i2c-mux/for-next' of https://github.com/peda-r/i2c-mux into i2c/for-5.2
Mainly some pca954x work, i.e. removal of unused platform data support and added support for sysfs interface for manipulating/examining the idle state. And then a mechanical cocci-style patch.
Diffstat (limited to 'Documentation/i2c/busses')
-rw-r--r--Documentation/i2c/busses/i2c-i8011
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diff --git a/Documentation/i2c/busses/i2c-i801 b/Documentation/i2c/busses/i2c-i801
index d1ee484a787d..ee9984f35868 100644
--- a/Documentation/i2c/busses/i2c-i801
+++ b/Documentation/i2c/busses/i2c-i801
@@ -36,6 +36,7 @@ Supported adapters:
* Intel Cannon Lake (PCH)
* Intel Cedar Fork (PCH)
* Intel Ice Lake (PCH)
+ * Intel Comet Lake (PCH)
Datasheets: Publicly available at the Intel website
On Intel Patsburg and later chipsets, both the normal host SMBus controller