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authorLinus Torvalds <torvalds@linux-foundation.org>2017-05-03 22:31:39 +0300
committerLinus Torvalds <torvalds@linux-foundation.org>2017-05-03 22:31:39 +0300
commitd25e436c4b68db2895185b24ad1f22499c2f87b0 (patch)
treedd66245410513f09d2439ef0b34cf1d131696bed /Documentation
parenta90f0e9ebb88ba7b0efea4e7d9defc0c2b96f712 (diff)
parent282ec0ea65dab88fda51b5b9b649958ae42f4ac0 (diff)
downloadlinux-d25e436c4b68db2895185b24ad1f22499c2f87b0.tar.xz
Merge tag 'spi-v4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown: "There's quite a lot of small driver specific fixes and enhancements in this release but the main activity has been around the loopback and spidev test drivers which is good to see as it should hopefully help improve the quality of all the drivers as people start to make use of the new code: - Additional tests in the loopback test driver for vmalloc() compatibility and around delays together with fixes for existing tests. - Support for testing continuous data transfer for use in soak testing. - Device property support for board info platforms. - Support for registering empty sets of devices via board info (useful when writing code to enumerate hardware automatically)" * tag 'spi-v4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (52 commits) spi: cadence: Allow for GPIO pins to be used as chipselects spi-imx: Implements handling of the SPI_READY mode flag. spi: tegra: fix spelling mistake: "trasfer" -> "transfer" spi: spi-ti-qspi: Use bounce buffer if read buffer is not DMA'ble spi: Add can_dma like interface for spi_flash_read spi: dw: Disable clock after unregistering the host spi: double time out tolerance spi: atmel: add deepest PM support to SAMA5D2 spi: atmel: factorize reusable code for SPI controller init spi: orion: add LSB support spi: pl022: don't use uninitialized variable spi: loopback-test: fix spelling mistake: "minimam" -> "minimum" spi: dynamycally allocated message initialization spi: spi-ti-qspi: Remove unused dma_dev variable spi: omap2-mcspi: poll OMAP2_MCSPI_CHSTAT_RXS for PIO transfer spi: spi-ti-qspi: Use dma_engine wrapper for dma memcpy call spi: spidev_test: add option to continuously transfer data spi: loopback-test: fix potential integer overflow on multiple spi: sun6i: update max transfer size reported spi: pl022: Document property values ...
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt7
-rw-r--r--Documentation/devicetree/bindings/spi/spi-bcm63xx-hsspi.txt33
-rw-r--r--Documentation/devicetree/bindings/spi/spi-bcm63xx.txt33
-rw-r--r--Documentation/devicetree/bindings/spi/spi_pl022.txt8
4 files changed, 77 insertions, 4 deletions
diff --git a/Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt b/Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt
index 8bc95e2fc47f..31b5b21598ff 100644
--- a/Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt
+++ b/Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt
@@ -23,6 +23,12 @@ See the clock consumer binding,
Obsolete properties:
- fsl,spi-num-chipselects : Contains the number of the chipselect
+Optional properties:
+- fsl,spi-rdy-drctl: Integer, representing the value of DRCTL, the register
+controlling the SPI_READY handling. Note that to enable the DRCTL consideration,
+the SPI_READY mode-flag needs to be set too.
+Valid values are: 0 (disabled), 1 (edge-triggered burst) and 2 (level-triggered burst).
+
Example:
ecspi@70010000 {
@@ -35,4 +41,5 @@ ecspi@70010000 {
<&gpio3 25 0>; /* GPIO3_25 */
dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
dma-names = "rx", "tx";
+ fsl,spi-rdy-drctl = <1>;
};
diff --git a/Documentation/devicetree/bindings/spi/spi-bcm63xx-hsspi.txt b/Documentation/devicetree/bindings/spi/spi-bcm63xx-hsspi.txt
new file mode 100644
index 000000000000..37b29ee13860
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-bcm63xx-hsspi.txt
@@ -0,0 +1,33 @@
+Binding for Broadcom BCM6328 High Speed SPI controller
+
+Required properties:
+- compatible: must contain of "brcm,bcm6328-hsspi".
+- reg: Base address and size of the controllers memory area.
+- interrupts: Interrupt for the SPI block.
+- clocks: phandles of the SPI clock and the PLL clock.
+- clock-names: must be "hsspi", "pll".
+- #address-cells: <1>, as required by generic SPI binding.
+- #size-cells: <0>, also as required by generic SPI binding.
+
+Optional properties:
+- num-cs: some controllers have less than 8 cs signals. Defaults to 8
+ if absent.
+
+Child nodes as per the generic SPI binding.
+
+Example:
+
+ spi@10001000 {
+ compatible = "brcm,bcm6328-hsspi";
+ reg = <0x10001000 0x600>;
+
+ interrupts = <29>;
+
+ clocks = <&clkctl 9>, <&hsspi_pll>;
+ clock-names = "hsspi", "pll";
+
+ num-cs = <2>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
diff --git a/Documentation/devicetree/bindings/spi/spi-bcm63xx.txt b/Documentation/devicetree/bindings/spi/spi-bcm63xx.txt
new file mode 100644
index 000000000000..1c16f6692613
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-bcm63xx.txt
@@ -0,0 +1,33 @@
+Binding for Broadcom BCM6348/BCM6358 SPI controller
+
+Required properties:
+- compatible: must contain one of "brcm,bcm6348-spi", "brcm,bcm6358-spi".
+- reg: Base address and size of the controllers memory area.
+- interrupts: Interrupt for the SPI block.
+- clocks: phandle of the SPI clock.
+- clock-names: has to be "spi".
+- #address-cells: <1>, as required by generic SPI binding.
+- #size-cells: <0>, also as required by generic SPI binding.
+
+Optional properties:
+- num-cs: some controllers have less than 8 cs signals. Defaults to 8
+ if absent.
+
+Child nodes as per the generic SPI binding.
+
+Example:
+
+ spi@10000800 {
+ compatible = "brcm,bcm6368-spi", "brcm,bcm6358-spi";
+ reg = <0x10000800 0x70c>;
+
+ interrupts = <1>;
+
+ clocks = <&clkctl 9>;
+ clock-names = "spi";
+
+ num-cs = <5>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
diff --git a/Documentation/devicetree/bindings/spi/spi_pl022.txt b/Documentation/devicetree/bindings/spi/spi_pl022.txt
index 4d1673ca8cf8..7638b4968ddb 100644
--- a/Documentation/devicetree/bindings/spi/spi_pl022.txt
+++ b/Documentation/devicetree/bindings/spi/spi_pl022.txt
@@ -30,7 +30,10 @@ contain the following properties.
0: SPI
1: Texas Instruments Synchronous Serial Frame Format
2: Microwire (Half Duplex)
-- pl022,com-mode : polling, interrupt or dma
+- pl022,com-mode : specifies the transfer mode:
+ 0: interrupt mode
+ 1: polling mode (default mode if property not present)
+ 2: DMA mode
- pl022,rx-level-trig : Rx FIFO watermark level
- pl022,tx-level-trig : Tx FIFO watermark level
- pl022,ctrl-len : Microwire interface: Control length
@@ -56,9 +59,7 @@ Example:
spi-max-frequency = <12000000>;
spi-cpol;
spi-cpha;
- pl022,hierarchy = <0>;
pl022,interface = <0>;
- pl022,slave-tx-disable;
pl022,com-mode = <0x2>;
pl022,rx-level-trig = <0>;
pl022,tx-level-trig = <0>;
@@ -67,4 +68,3 @@ Example:
pl022,duplex = <0>;
};
};
-