diff options
| author | Christoph Hellwig <hch@lst.de> | 2017-10-01 10:37:35 +0300 |
|---|---|---|
| committer | Christoph Hellwig <hch@lst.de> | 2017-10-04 12:42:53 +0300 |
| commit | 8969f1f8291762c13147c1ba89d46238af01675b (patch) | |
| tree | 58ca18d9dca3a958db82bc39bc439aa71f07fb3b /MAINTAINERS | |
| parent | 007a61ae2f35c7fcf767313285c4924e81f11983 (diff) | |
| download | linux-8969f1f8291762c13147c1ba89d46238af01675b.tar.xz | |
nvme-pci: Use PCI bus address for data/queues in CMB
Currently, NVMe PCI host driver is programming CMB dma address as
I/O SQs addresses. This results in failures on systems where 1:1
outbound mapping is not used (example Broadcom iProc SOCs) because
CMB BAR will be progammed with PCI bus address but NVMe PCI EP will
try to access CMB using dma address.
To have CMB working on systems without 1:1 outbound mapping, we
program PCI bus address for I/O SQs instead of dma address. This
approach will work on systems with/without 1:1 outbound mapping.
Based on a report and previous patch from Abhishek Shah.
Fixes: 8ffaadf7 ("NVMe: Use CMB for the IO SQes if available")
Cc: stable@vger.kernel.org
Reported-by: Abhishek Shah <abhishek.shah@broadcom.com>
Tested-by: Abhishek Shah <abhishek.shah@broadcom.com>
Reviewed-by: Keith Busch <keith.busch@intel.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Diffstat (limited to 'MAINTAINERS')
0 files changed, 0 insertions, 0 deletions