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| author | Suman Anna <s-anna@ti.com> | 2020-02-28 01:28:37 +0300 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2020-03-04 19:16:34 +0300 |
| commit | ecdeca6d961c647dac33c300806c051bba4762ce (patch) | |
| tree | e3dd5054fe2d3e8ea86d6ab27b3a4e05a9427735 /arch/arm/boot/dts/am57-pruss.dtsi | |
| parent | 44e66a5d9d8fc2bb706458ffa3e0560dded7ccf5 (diff) | |
| download | linux-ecdeca6d961c647dac33c300806c051bba4762ce.tar.xz | |
ARM: dts: dra7: Add PRU-ICSS interconnect target-module nodes
The AM57xx family of SoCs contains two identical PRU-ICSS instances
that have a very unique SYSC register. The IPs do not have any
PRCM reset lines unlike those on AM33xx/AM437x SoCs. Add the PRUSS
interconnect target-module nodes with all the required properties.
Each of the PRUSS devices themselves shall be added as child nodes
to the corresponding interconnect node in the future. The PRU-ICSS
instances are only available on AM57xx family of SoCs and are not
supported on DRA7xx family of SoCs in general, so the target module
nodes are added in a separate dtsi file. This new dtsi file is
included in all the AM57xx SoC dtsi files, so the nodes are
automatically inherited and enabled on all AM57xx boards.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/am57-pruss.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/am57-pruss.dtsi | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/am57-pruss.dtsi b/arch/arm/boot/dts/am57-pruss.dtsi new file mode 100644 index 000000000000..b1c583dee10b --- /dev/null +++ b/arch/arm/boot/dts/am57-pruss.dtsi @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ + * + * Common PRUSS data for TI AM57xx platforms + */ + +&ocp { + pruss1_tm: target-module@4b226000 { + compatible = "ti,sysc-pruss", "ti,sysc"; + reg = <0x4b226000 0x4>, + <0x4b226004 0x4>; + reg-names = "rev", "sysc"; + ti,sysc-mask = <(SYSC_PRUSS_STANDBY_INIT | + SYSC_PRUSS_SUB_MWAIT)>; + ti,sysc-midle = <SYSC_IDLE_FORCE>, + <SYSC_IDLE_NO>, + <SYSC_IDLE_SMART>; + ti,sysc-sidle = <SYSC_IDLE_FORCE>, + <SYSC_IDLE_NO>, + <SYSC_IDLE_SMART>; + /* Domains (P, C): coreaon_pwrdm, l4per2_clkdm */ + clocks = <&l4per2_clkctrl DRA7_L4PER2_PRUSS1_CLKCTRL 0>; + clock-names = "fck"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x00000000 0x4b200000 0x80000>; + }; + + pruss2_tm: target-module@4b2a6000 { + compatible = "ti,sysc-pruss", "ti,sysc"; + reg = <0x4b2a6000 0x4>, + <0x4b2a6004 0x4>; + reg-names = "rev", "sysc"; + ti,sysc-mask = <(SYSC_PRUSS_STANDBY_INIT | + SYSC_PRUSS_SUB_MWAIT)>; + ti,sysc-midle = <SYSC_IDLE_FORCE>, + <SYSC_IDLE_NO>, + <SYSC_IDLE_SMART>; + ti,sysc-sidle = <SYSC_IDLE_FORCE>, + <SYSC_IDLE_NO>, + <SYSC_IDLE_SMART>; + /* Domains (P, C): coreaon_pwrdm, l4per2_clkdm */ + clocks = <&l4per2_clkctrl DRA7_L4PER2_PRUSS2_CLKCTRL 0>; + clock-names = "fck"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x00000000 0x4b280000 0x80000>; + }; +}; |