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authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>2013-11-25 20:26:47 +0400
committerJason Cooper <jason@lakedaemon.net>2013-11-25 22:24:36 +0400
commit96039f735e290281d0c8a08fc467de2cd610543d (patch)
treed7639dcab4786114f4687bc6d57b5942d7feef82 /arch/arm/boot/dts/armada-370-db.dts
parentb6dda00cddcc71d2030668bc0cc0fed758c411c2 (diff)
downloadlinux-96039f735e290281d0c8a08fc467de2cd610543d.tar.xz
ARM: mvebu: re-enable PCIe on Armada 370 DB
Commit 14fd8ed0a7fd19913 ("ARM: mvebu: Relocate Armada 370/XP PCIe device tree nodes") relocated the PCIe controller DT nodes one level up in the Device Tree, to reflect a more correct representation of the hardware introduced by the mvebu-mbus Device Tree binding. However, while most of the boards were properly adjusted accordingly, the Armada 370 DB board was left unchanged, and therefore, PCIe is seen as not enabled on this board. This patch fixes that by moving the PCIe controller node one level-up in armada-370-db.dts. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: <stable@vger.kernel.org> # v3.12+ Fixes: 14fd8ed0a7fd19913 "ARM: mvebu: Relocate Armada 370/XP PCIe device tree nodes" Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/boot/dts/armada-370-db.dts')
-rw-r--r--arch/arm/boot/dts/armada-370-db.dts28
1 files changed, 14 insertions, 14 deletions
diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts
index 90ce29dbe119..08a56bcfc724 100644
--- a/arch/arm/boot/dts/armada-370-db.dts
+++ b/arch/arm/boot/dts/armada-370-db.dts
@@ -99,22 +99,22 @@
spi-max-frequency = <50000000>;
};
};
+ };
- pcie-controller {
+ pcie-controller {
+ status = "okay";
+ /*
+ * The two PCIe units are accessible through
+ * both standard PCIe slots and mini-PCIe
+ * slots on the board.
+ */
+ pcie@1,0 {
+ /* Port 0, Lane 0 */
+ status = "okay";
+ };
+ pcie@2,0 {
+ /* Port 1, Lane 0 */
status = "okay";
- /*
- * The two PCIe units are accessible through
- * both standard PCIe slots and mini-PCIe
- * slots on the board.
- */
- pcie@1,0 {
- /* Port 0, Lane 0 */
- status = "okay";
- };
- pcie@2,0 {
- /* Port 1, Lane 0 */
- status = "okay";
- };
};
};
};