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authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>2013-10-03 18:35:26 +0400
committerJason Cooper <jason@lakedaemon.net>2013-10-03 19:13:01 +0400
commit7837feff0d881835309fced7a7c4b5f32866d632 (patch)
treec57e16207e3e0b130447b3361e2e58dad1a652f6 /arch/arm/boot/dts/armada-xp-matrix.dts
parent148c274ea64448673c4294e32cfd0d60b524ca9a (diff)
downloadlinux-7837feff0d881835309fced7a7c4b5f32866d632.tar.xz
arm: mvebu: add support for the Armada XP Matrix board
The Armada XP Matrix board is the mother board of a more complex system. The mother board uses an Armada XP MV78460, 4 serial ports, 2 SATA ports, one Ethernet connection, a PCIe port and a USB port. All those devices are enabled in the Device Tree added by this patch. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/boot/dts/armada-xp-matrix.dts')
-rw-r--r--arch/arm/boot/dts/armada-xp-matrix.dts75
1 files changed, 75 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/armada-xp-matrix.dts b/arch/arm/boot/dts/armada-xp-matrix.dts
new file mode 100644
index 000000000000..e47c49ecd55c
--- /dev/null
+++ b/arch/arm/boot/dts/armada-xp-matrix.dts
@@ -0,0 +1,75 @@
+/*
+ * Device Tree file for Marvell Armada XP Matrix board
+ *
+ * Copyright (C) 2013 Marvell
+ *
+ * Lior Amsalem <alior@marvell.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+#include "armada-xp-mv78460.dtsi"
+
+/ {
+ model = "Marvell Armada XP Matrix Board";
+ compatible = "marvell,axp-matrix", "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
+
+ chosen {
+ bootargs = "console=ttyS0,115200 earlyprintk";
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0 0x00000000 0 0x80000000>; /* 2 GB */
+ };
+
+ soc {
+ ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
+ MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
+
+ internal-regs {
+ serial@12000 {
+ clock-frequency = <250000000>;
+ status = "okay";
+ };
+ serial@12100 {
+ clock-frequency = <250000000>;
+ status = "okay";
+ };
+ serial@12200 {
+ clock-frequency = <250000000>;
+ status = "okay";
+ };
+ serial@12300 {
+ clock-frequency = <250000000>;
+ status = "okay";
+ };
+
+ sata@a0000 {
+ nr-ports = <2>;
+ status = "okay";
+ };
+
+ ethernet@30000 {
+ status = "okay";
+ phy-mode = "sgmii";
+ };
+
+ pcie-controller {
+ status = "okay";
+
+ pcie@1,0 {
+ /* Port 0, Lane 0 */
+ status = "okay";
+ };
+ };
+
+ usb@50000 {
+ status = "okay";
+ };
+ };
+ };
+};