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authorEzequiel Garcia <ezequiel.garcia@free-electrons.com>2013-04-10 23:04:03 +0400
committerJason Cooper <jason@lakedaemon.net>2013-04-11 21:29:08 +0400
commita7d4f81821f7eec3175f8e23dd6949c71ab2da43 (patch)
treeb4e66bdae870c8a7cf66b1c6e744169a1665131c /arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
parentda8d1b38356853c37116f9afa29f15648d7fb159 (diff)
downloadlinux-a7d4f81821f7eec3175f8e23dd6949c71ab2da43.tar.xz
ARM: mvebu: Add support for NOR flash device on Openblocks AX3 board
The Plat'home Openblocks AX3 has a 128 MiB NOR flash device connected to the Device Bus. This commit adds the device tree node to support this device. The SoC supports a flexible and dynamic decoding window allocation scheme; but since this feature is still not implemented we need to specify the window base address in the device tree node itself. This base address has been selected in a completely arbitrary fashion. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts')
-rw-r--r--arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts29
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
index 3818a82176a2..b5c5f4d43688 100644
--- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
+++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
@@ -139,5 +139,34 @@
usb@d0051000 {
status = "okay";
};
+
+ devbus-bootcs@d0010400 {
+ status = "okay";
+ ranges = <0 0xf0000000 0x8000000>; /* @addr 0xf000000, size 0x8000000 */
+
+ /* Device Bus parameters are required */
+
+ /* Read parameters */
+ devbus,bus-width = <8>;
+ devbus,turn-off-ps = <60000>;
+ devbus,badr-skew-ps = <0>;
+ devbus,acc-first-ps = <124000>;
+ devbus,acc-next-ps = <248000>;
+ devbus,rd-setup-ps = <0>;
+ devbus,rd-hold-ps = <0>;
+
+ /* Write parameters */
+ devbus,sync-enable = <0>;
+ devbus,wr-high-ps = <60000>;
+ devbus,wr-low-ps = <60000>;
+ devbus,ale-wr-ps = <60000>;
+
+ /* NOR 128 MiB */
+ nor@0 {
+ compatible = "cfi-flash";
+ reg = <0 0x8000000>;
+ bank-width = <2>;
+ };
+ };
};
};