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authorJoel Stanley <joel@jms.id.au>2017-04-06 04:41:43 +0300
committerJoel Stanley <joel@jms.id.au>2017-04-07 04:45:30 +0300
commit491bdcfa8c41995419a6719f83016d7a43008f38 (patch)
tree60125ec02a8518eae3771c427b338990380ea33b /arch/arm/boot/dts/aspeed-g4.dtsi
parent8b9102da97293073f065fe5dfd49d21580b84e2b (diff)
downloadlinux-491bdcfa8c41995419a6719f83016d7a43008f38.tar.xz
ARM: dts: aspeed: Make G4 clocks fixed
We do not yet have a clk driver upstream. So that users can boot the unmodified upstream kernel, add fixed-clock and clock-frequency properties to all of the clocks. The values are taken from the Palmetto system. This is the only upstream dts. It also happens to match all of the systems seen so far. Acked-by: Cédric Le Goater <clg@kaod.org> Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm/boot/dts/aspeed-g4.dtsi')
-rw-r--r--arch/arm/boot/dts/aspeed-g4.dtsi68
1 files changed, 39 insertions, 29 deletions
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index 7ef6442d0ade..4e3f055b365c 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -18,15 +18,6 @@
};
};
- clocks {
- clk_clkin: clk_clkin {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <48000000>;
- };
-
- };
-
ahb {
compatible = "simple-bus";
#address-cells = <1>;
@@ -92,16 +83,48 @@
#size-cells = <1>;
ranges;
- clk_hpll: clk_hpll@1e6e2070 {
- #clock-cells = <0>;
- compatible = "aspeed,g4-hpll-clock";
- reg = <0x1e6e2070 0x4>;
- clocks = <&clk_clkin>;
- };
-
syscon: syscon@1e6e2000 {
compatible = "aspeed,g4-scu", "syscon", "simple-mfd";
reg = <0x1e6e2000 0x1a8>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ clk_clkin: clk_clkin {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <48000000>;
+ };
+
+ clk_hpll: clk_hpll@70 {
+ #clock-cells = <0>;
+ compatible = "aspeed,g4-hpll-clock", "fixed-clock";
+ reg = <0x70>;
+ clocks = <&clk_clkin>;
+ clock-frequency = <384000000>;
+ };
+
+ clk_ahb: clk_ahb@70 {
+ #clock-cells = <0>;
+ compatible = "aspeed,g4-ahb-clock", "fixed-clock";
+ reg = <0x70>;
+ clocks = <&clk_hpll>;
+ clock-frequency = <192000000>;
+ };
+
+ clk_apb: clk_apb@08 {
+ #clock-cells = <0>;
+ compatible = "aspeed,g4-apb-clock", "fixed-clock";
+ reg = <0x08>;
+ clocks = <&clk_hpll>;
+ clock-frequency = <48000000>;
+ };
+
+ clk_uart: clk_uart@2c{
+ #clock-cells = <0>;
+ compatible = "aspeed,g4-uart-clock", "fixed-clock";
+ reg = <0x2c>;
+ clock-frequency = <24000000>;
+ };
pinctrl: pinctrl {
compatible = "aspeed,g4-pinctrl";
@@ -849,19 +872,6 @@
};
};
- clk_apb: clk_apb@1e6e2008 {
- #clock-cells = <0>;
- compatible = "aspeed,g4-apb-clock";
- reg = <0x1e6e2008 0x4>;
- clocks = <&clk_hpll>;
- };
-
- clk_uart: clk_uart@1e6e2008 {
- #clock-cells = <0>;
- compatible = "aspeed,uart-clock";
- reg = <0x1e6e202c 0x4>;
- };
-
sram@1e720000 {
compatible = "mmio-sram";
reg = <0x1e720000 0x8000>; // 32K