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authorCédric Le Goater <clg@kaod.org>2018-06-22 10:09:36 +0300
committerJoel Stanley <joel@jms.id.au>2019-11-01 08:03:21 +0300
commit876c5d891c9d7442d2734871317bc6480cd9f80e (patch)
treea3740c859a3a4e04bae775ea92582e38d63f885f /arch/arm/boot/dts/aspeed-g5.dtsi
parentb46aaf8a663da643109597ab073fd6076b4e6eaa (diff)
downloadlinux-876c5d891c9d7442d2734871317bc6480cd9f80e.tar.xz
ARM: dts: aspeed: Add "spi-max-frequency" property
Keep the FMC controller chips at a safe 50 MHz rate and use 100 MHz for the PNOR on the machines using a AST2500 SoC. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm/boot/dts/aspeed-g5.dtsi')
-rw-r--r--arch/arm/boot/dts/aspeed-g5.dtsi7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index d9ff5bf16223..3449bcc93d7b 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -72,16 +72,19 @@
flash@0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
+ spi-max-frequency = <50000000>;
status = "disabled";
};
flash@1 {
reg = < 1 >;
compatible = "jedec,spi-nor";
+ spi-max-frequency = <50000000>;
status = "disabled";
};
flash@2 {
reg = < 2 >;
compatible = "jedec,spi-nor";
+ spi-max-frequency = <50000000>;
status = "disabled";
};
};
@@ -97,11 +100,13 @@
flash@0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
+ spi-max-frequency = <50000000>;
status = "disabled";
};
flash@1 {
reg = < 1 >;
compatible = "jedec,spi-nor";
+ spi-max-frequency = <50000000>;
status = "disabled";
};
};
@@ -117,11 +122,13 @@
flash@0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
+ spi-max-frequency = <50000000>;
status = "disabled";
};
flash@1 {
reg = < 1 >;
compatible = "jedec,spi-nor";
+ spi-max-frequency = <50000000>;
status = "disabled";
};
};