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authorBoris Brezillon <boris.brezillon@free-electrons.com>2017-05-30 12:20:53 +0300
committerAlexandre Belloni <alexandre.belloni@free-electrons.com>2017-05-31 12:55:41 +0300
commit1004a2977bdc7566bca87c565541c3232ed467c4 (patch)
treeff3d3aca77c0e3288c6296263dd0795e60680478 /arch/arm/boot/dts/at91-linea.dtsi
parentd9c41bf30cf8cea379f5947624e76c893791fec0 (diff)
downloadlinux-1004a2977bdc7566bca87c565541c3232ed467c4.tar.xz
ARM: dts: at91: Switch to the new NAND bindings
Use the new EBI/NAND bindings to declare NAND chips and remove old NAND nodes along the way. Note that we keep using old bindings in at91rm9200.dtsi because this SoC is not supported by the EBI driver. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Peter Rosin <peda@axentia.se> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/at91-linea.dtsi')
-rw-r--r--arch/arm/boot/dts/at91-linea.dtsi25
1 files changed, 18 insertions, 7 deletions
diff --git a/arch/arm/boot/dts/at91-linea.dtsi b/arch/arm/boot/dts/at91-linea.dtsi
index 9bf9aaeff3e8..87e5090fb4c4 100644
--- a/arch/arm/boot/dts/at91-linea.dtsi
+++ b/arch/arm/boot/dts/at91-linea.dtsi
@@ -37,13 +37,24 @@
};
};
-&nand0 {
+&ebi {
+ pinctrl-0 = <&pinctrl_ebi_nand_addr>;
+ pinctrl-names = "default";
status = "okay";
+};
+
- nand-bus-width = <8>;
- nand-ecc-mode = "hw";
- atmel,has-pmecc;
- atmel,pmecc-cap = <4>;
- atmel,pmecc-sector-size = <512>;
- nand-on-flash-bbt;
+&nand_controller {
+ status = "okay";
+
+ nand: nand@3 {
+ reg = <0x3 0x0 0x2>;
+ atmel,rb = <0>;
+ nand-bus-width = <8>;
+ nand-ecc-mode = "hw";
+ nand-ecc-strength = <4>;
+ nand-ecc-step-size = <512>;
+ nand-on-flash-bbt;
+ label = "atmel_nand";
+ };
};