diff options
author | Arnd Bergmann <arnd@arndb.de> | 2023-04-14 18:57:53 +0300 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2023-04-14 18:57:53 +0300 |
commit | 0b3751dc8d4cbf5c61f25387b26e14c35548d286 (patch) | |
tree | f8312dc676528ce22b3b239b6edae4734cd7b20a /arch/arm/boot/dts/bcm63178.dtsi | |
parent | 325ae154b42b32c8ee114f4286364d153117fe59 (diff) | |
parent | 7858dded8c1e983740b46857660526575583d2a2 (diff) | |
download | linux-0b3751dc8d4cbf5c61f25387b26e14c35548d286.tar.xz |
Merge tag 'arm-soc/for-6.4/devicetree' of https://github.com/Broadcom/stblinux into soc/dt
This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 6.4, please pull the following:
- William adds the new-style High Speed SPI controller node to the BCA
SoCs
* tag 'arm-soc/for-6.4/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: broadcom: bcmbca: Add spi controller node
Link: https://lore.kernel.org/r/20230410232606.1917803-1-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot/dts/bcm63178.dtsi')
-rw-r--r-- | arch/arm/boot/dts/bcm63178.dtsi | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/bcm63178.dtsi b/arch/arm/boot/dts/bcm63178.dtsi index 043e699cbc27..d8268a1e889b 100644 --- a/arch/arm/boot/dts/bcm63178.dtsi +++ b/arch/arm/boot/dts/bcm63178.dtsi @@ -71,6 +71,7 @@ #clock-cells = <0>; clock-frequency = <200000000>; }; + uart_clk: uart-clk { compatible = "fixed-factor-clock"; #clock-cells = <0>; @@ -78,6 +79,12 @@ clock-div = <4>; clock-mult = <1>; }; + + hsspi_pll: hsspi-pll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; }; psci { @@ -109,6 +116,18 @@ #size-cells = <1>; ranges = <0 0xff800000 0x800000>; + hsspi: spi@1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,bcm63178-hsspi", "brcm,bcmbca-hsspi-v1.0"; + reg = <0x1000 0x600>; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&hsspi_pll &hsspi_pll>; + clock-names = "hsspi", "pll"; + num-cs = <8>; + status = "disabled"; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; |