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authorAlim Akhtar <alim.akhtar@samsung.com>2013-01-17 03:41:01 +0400
committerKukjin Kim <kgene.kim@samsung.com>2013-01-17 03:45:52 +0400
commit753bd6ddf4802ce4b985890fb70ff4997a70afb8 (patch)
treeec7ad72076c884acff2236b42190fb9d3ebf1541 /arch/arm/boot/dts/cros5250-common.dtsi
parentc0d6cfd3007c16f03b74bfc5ab80d8ab47402fff (diff)
downloadlinux-753bd6ddf4802ce4b985890fb70ff4997a70afb8.tar.xz
ARM: dts: correct the dw-mshc timing properties as per binding
As per the current exynos-dw-mshc bindings, dw-mshc-sdr-timing and dw-mshc-ddr-timing properties are having only two cells, these properties are wrongly set for exynos5250 based cros5250 and smdk5250 platfroms. This patch corrects above timing propreties for above platfroms Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Tested-by: Doug Anderson <dianders@chromium.org> Acked-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/boot/dts/cros5250-common.dtsi')
-rw-r--r--arch/arm/boot/dts/cros5250-common.dtsi12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/cros5250-common.dtsi b/arch/arm/boot/dts/cros5250-common.dtsi
index fddd17417433..46c098017036 100644
--- a/arch/arm/boot/dts/cros5250-common.dtsi
+++ b/arch/arm/boot/dts/cros5250-common.dtsi
@@ -96,8 +96,8 @@
fifo-depth = <0x80>;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
- samsung,dw-mshc-sdr-timing = <2 3 3>;
- samsung,dw-mshc-ddr-timing = <1 2 3>;
+ samsung,dw-mshc-sdr-timing = <2 3>;
+ samsung,dw-mshc-ddr-timing = <1 2>;
slot@0 {
reg = <0>;
@@ -120,8 +120,8 @@
fifo-depth = <0x80>;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
- samsung,dw-mshc-sdr-timing = <2 3 3>;
- samsung,dw-mshc-ddr-timing = <1 2 3>;
+ samsung,dw-mshc-sdr-timing = <2 3>;
+ samsung,dw-mshc-ddr-timing = <1 2>;
slot@0 {
reg = <0>;
@@ -141,8 +141,8 @@
fifo-depth = <0x80>;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
- samsung,dw-mshc-sdr-timing = <2 3 3>;
- samsung,dw-mshc-ddr-timing = <1 2 3>;
+ samsung,dw-mshc-sdr-timing = <2 3>;
+ samsung,dw-mshc-ddr-timing = <1 2>;
slot@0 {
reg = <0>;