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authorKrzysztof Kozlowski <krzk@kernel.org>2016-09-16 22:42:43 +0300
committerKrzysztof Kozlowski <krzk@kernel.org>2016-11-03 23:39:42 +0300
commit71990ea32f1fd4b7242380e46f0febd5c1b9c61c (patch)
treef78bfc27ba5974cfdc78b4826ee7c2650e44922a /arch/arm/boot/dts/exynos4210-pinctrl.dtsi
parent63aee4fa75be5879f0fd34b031f4d5587e354a81 (diff)
downloadlinux-71990ea32f1fd4b7242380e46f0febd5c1b9c61c.tar.xz
ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos4210
Interrupt of type IRQ_TYPE_NONE is not allowed for GIC interrupts and generates an error: genirq: Setting trigger mode 0 for irq 16 failed (gic_set_type+0x0/0x68) The GIC requires shared interrupts to be edge rising or level high. Platform declares support for both. Arbitrarily choose level high everywhere hoping it will work on each platform. Reported-by: Marek Szyprowski <m.szyprowski@samsung.com> Reported-by: Alban Browaeys <alban.browaeys@gmail.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Diffstat (limited to 'arch/arm/boot/dts/exynos4210-pinctrl.dtsi')
-rw-r--r--arch/arm/boot/dts/exynos4210-pinctrl.dtsi20
1 files changed, 16 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
index d9b6d25e4abe..264b43228cfd 100644
--- a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
@@ -537,8 +537,14 @@
interrupt-controller;
interrupt-parent = <&gic>;
- interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
- <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>;
+ interrupts = <0 16 IRQ_TYPE_LEVEL_HIGH>,
+ <0 17 IRQ_TYPE_LEVEL_HIGH>,
+ <0 18 IRQ_TYPE_LEVEL_HIGH>,
+ <0 19 IRQ_TYPE_LEVEL_HIGH>,
+ <0 20 IRQ_TYPE_LEVEL_HIGH>,
+ <0 21 IRQ_TYPE_LEVEL_HIGH>,
+ <0 22 IRQ_TYPE_LEVEL_HIGH>,
+ <0 23 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>;
};
@@ -548,8 +554,14 @@
interrupt-controller;
interrupt-parent = <&gic>;
- interrupts = <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
- <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
+ interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>,
+ <0 25 IRQ_TYPE_LEVEL_HIGH>,
+ <0 26 IRQ_TYPE_LEVEL_HIGH>,
+ <0 27 IRQ_TYPE_LEVEL_HIGH>,
+ <0 28 IRQ_TYPE_LEVEL_HIGH>,
+ <0 29 IRQ_TYPE_LEVEL_HIGH>,
+ <0 30 IRQ_TYPE_LEVEL_HIGH>,
+ <0 31 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>;
};